Gitiles
Code Review Sign In
review.coreboot.org / coreboot / a963acdcc70747911981afcd1474d39d75ca8804 / src / soc / intel / skylake / romstage / romstage_fsp20.c
  1. a963acd arch/x86: Add <arch/romstage.h> by Kyösti Mälkki · 5 years ago
  2. 14222d8 arch/x86: Change smm_subregion() prototype by Kyösti Mälkki · 5 years ago
  3. b2a5f0b cpu/x86/smm: Promote smm_subregion() by Kyösti Mälkki · 5 years ago
  4. 71756c21 soc/intel: Expand SA_DEV_ROOT for ramstage by Kyösti Mälkki · 5 years ago
  5. 8950cfb soc/intel: Use config_of() by Kyösti Mälkki · 5 years ago
  6. 903b40a soc/intel: Replace uses of dev_find_slot() by Kyösti Mälkki · 5 years ago
  7. 6e2d0c1 arch/x86: Adjust size of postcar stack by Kyösti Mälkki · 5 years ago
  8. 2874330 Revert "soc/intel/skylake/romstage: Increase size of postcar stack" by Kyösti Mälkki · 5 years ago
  9. 1a86cda soc/intel: Provide SPD manufacturer ID and module type to SMBIOS by Duncan Laurie · 5 years ago
  10. f70cb8b soc/intel/skylake/romstage: Increase size of postcar stack by Christian Walter · 5 years ago
  11. f972322 src/soc/intel/common/smbios: Add addtional infos to dimm_info by Christian Walter · 5 years ago
  12. 8a1b94c Clean up unused arch/early_variables.h header by Arthur Heymans · 5 years ago
  13. 46340d0 soc/intel: Fill DIMM serial number from SPD by Duncan Laurie · 5 years ago
  14. 3ba3807 soc/intel/skylake: remove PrimaryDisplay check by Maxim Polyakov · 5 years ago
  15. 5806665 soc/skl: set IGD resources only if device is enabled by Maxim Polyakov · 5 years ago
  16. c338507 soc/{amd,intel}/chip: Use local include for chip.h by Elyes HAOUAS · 5 years ago
  17. a12e9b0 soc/skl: Update SkipExtGfxScan in UPD from devtree by Maxim Polyakov · 5 years ago
  18. 0220d1e soc/intel/skylake: Set FSP options for PEG port by Maxim Polyakov · 5 years ago
  19. de08ae1 soc/intel/skylake: Update GFX devtree options by Maxim Polyakov · 5 years ago
  20. cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
  21. 065857e arch/io.h: Drop unnecessary include by Kyösti Mälkki · 5 years ago
  22. 993f68a soc/intel: Add mem_rank info in SMBIOS by Francois Toguo · 6 years ago
  23. 6275e34 soc/intel/skylake: Use real common code for VMX init by Nico Huber · 6 years ago
  24. 0ce41f1 src: Add required space after "switch" by Elyes HAOUAS · 6 years ago
  25. 28114ae SMBIOS: Remove duplicated smbios_memory_type enum by Elyes HAOUAS · 6 years ago
  26. d44221f Move compiler.h to commonlib by Nico Huber · 6 years ago
  27. ef250c4 soc/intel/skylake: Add support for CmdTriStateDis UPD in devicetree by Shaunak Saha · 6 years ago
  28. 6ea6775 soc/{amd,intel}: Use postcar_frame_add_romcache() by Nico Huber · 6 years ago
  29. 9593e97 soc/{amd,intel}: Use CACHE_ROM_(BASE|SIZE) by Nico Huber · 6 years ago
  30. 6403167 compiler.h: add __weak macro by Aaron Durbin · 6 years ago
  31. 2afe4dc soc/intel/skylake: Enable VT-d and X2APIC by Nico Huber · 7 years ago
  32. 54fa28e soc/intel/skylake: Clean up SMBIOS Table Type 17 creation by Subrata Banik · 7 years ago
  33. f7f01f7 soc/intel/skylake: Send correct ddr_type to SMBIOS Table by Barnali Sarkar · 7 years ago
  34. fea2429 security/vboot: Move vboot2 to security kconfig section by Philipp Deppenwiese · 7 years ago
  35. d347680 soc/intel/skylake: Add support in SKL for PMC common code by Shaunak Saha · 7 years ago
  36. bd55c02 vendor/intel/skykabylake: Update FSP header files to version 2.7.2 by Balaji Manigandan B · 7 years ago
  37. e0b5795 soc/intel/skylake: Configure FSP to skip ME MBP step by Duncan Laurie · 7 years ago
  38. 9dc62ea soc/intel/skylake: Fix broken memory info HOB scanning by Nico Huber · 7 years ago
  39. ff48b3b soc/intel/skylake: Enable SMBus based on mainboard config by Naresh G Solanki · 7 years ago
  40. 4dc9fb0 soc/intel/skylake: reduce postcar stack usage for fsp 2.0 by Aaron Durbin · 7 years ago
  41. 3214bc4 soc/intel/skylake: Remove “disable SaGv” in recovery mode flow by Subrata Banik · 7 years ago
  42. 79f0741 soc/intel/skylake: use postcar stage for fsp 2.0 by Aaron Durbin · 7 years ago
  43. 6375512 soc/intel/skylake: Add configs for enabling DCI and TraceHub by Aamir Bohra · 8 years ago
  44. b7fa7fb soc/intel/skylake: Extract DIMM Information from FSP MEM INFO HOB by Barnali Sarkar · 8 years ago
  45. e65affa soc/intel/skylake: add PrmrrSize to chip config by Robbie Zhang · 8 years ago
  46. ffc934d intel MMA: Enable MMA with FSP2.0 by Pratik Prajapati · 8 years ago
  47. 847da79 soc/intel/skylake: Remove redundant BootLoaderTolumSize assignment by Subrata Banik · 8 years ago
  48. 79239b7 soc/intel/skylake: Pass proper CPU flex ratio override to FSP by Naresh G Solanki · 8 years ago
  49. f796c6e driver/intel/fsp2_0: Add version parameter to FSP platform callback by Andrey Petrov · 8 years ago
  50. 5bf42c6 soc/intel/skylake: Add FSP 2.0 support in romstage by Barnali Sarkar · 8 years ago
  51. 1222a73 skylake: Add initial FSP2.0 support by Rizwan Qureshi · 8 years ago