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review.coreboot.org / coreboot / a963acdcc70747911981afcd1474d39d75ca8804 / src / soc / intel / quark / romstage / fsp2_0.c
  1. a963acd arch/x86: Add <arch/romstage.h> by Kyösti Mälkki · 5 years ago
  2. 8950cfb soc/intel: Use config_of() by Kyösti Mälkki · 5 years ago
  3. 6e2d0c1 arch/x86: Adjust size of postcar stack by Kyösti Mälkki · 5 years ago
  4. 84e22e3 soc/intel/quark: Don't use CAR_GLOBAL by Arthur Heymans · 5 years ago
  5. 1835bf0 post_code: add post code for critical CBFS failures by Keith Short · 5 years ago
  6. be291e8 soc/intel/fsp1.1: Implement postcar stage by Arthur Heymans · 6 years ago
  7. cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
  8. e613d70 console: Split loglevel for fast and slow by Kyösti Mälkki · 6 years ago
  9. e737755 device: Use pcidev_path_on_root() by Kyösti Mälkki · 6 years ago
  10. 6f01f43 soc/intel: Get rid of device_t by Elyes HAOUAS · 6 years ago
  11. 6ea6775 soc/{amd,intel}: Use postcar_frame_add_romcache() by Nico Huber · 6 years ago
  12. 9593e97 soc/{amd,intel}: Use CACHE_ROM_(BASE|SIZE) by Nico Huber · 6 years ago
  13. 16bc9ba soc/intel/quark: Add SD/MMC test support by Lee Leahy · 7 years ago
  14. 70bb057 soc/intel/quark: Read the rmu.bin file from read-only region by Lee Leahy · 7 years ago
  15. 94b971a soc/intel/quark: Fix errors detected by checkpatch by Lee Leahy · 7 years ago
  16. f796c6e driver/intel/fsp2_0: Add version parameter to FSP platform callback by Andrey Petrov · 8 years ago
  17. 44ec92a soc/intel/quark: Fix FSP 2.0 build by Lee Leahy · 8 years ago
  18. 5e07a7e soc/intel/quark: Switch to using serial routines for FSP by Lee Leahy · 8 years ago
  19. d526361 soc/intel/quark: Disable FSP serial output by Lee Leahy · 8 years ago
  20. f26fc0f soc/intel/quark: Add FSP 2.0 romstage support by Lee Leahy · 8 years ago
  21. 102f625 soc/intel/quark: Add FSP 2.0 boot block support by Lee Leahy · 8 years ago