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review.coreboot.org / coreboot / a765090f0d2f77cb099a60c23da8acaff62cb171 / src / soc / intel / quark / romstage
  1. a765090 soc/intel/quark: Add early debugging code by Lee Leahy · 8 years ago
  2. f796c6e driver/intel/fsp2_0: Add version parameter to FSP platform callback by Andrey Petrov · 8 years ago
  3. 44ec92a soc/intel/quark: Fix FSP 2.0 build by Lee Leahy · 8 years ago
  4. 5e07a7e soc/intel/quark: Switch to using serial routines for FSP by Lee Leahy · 8 years ago
  5. f74ce24 soc/intel/quark: Clean up debug output levels by Lee Leahy · 8 years ago
  6. d526361 soc/intel/quark: Disable FSP serial output by Lee Leahy · 8 years ago
  7. f26fc0f soc/intel/quark: Add FSP 2.0 romstage support by Lee Leahy · 8 years ago
  8. 102f625 soc/intel/quark: Add FSP 2.0 boot block support by Lee Leahy · 8 years ago
  9. 01728bb soc/intel/quark: Prepare for FSP2.0 support by Lee Leahy · 8 years ago
  10. 0c1843a soc/intel/quark: Fix car_stage_entry routine name. by Lee Leahy · 8 years ago
  11. ae738ac cpu/x86: Support CPUs without rdmsr/wrmsr instructions by Lee Leahy · 8 years ago
  12. f1e22d5 soc/intel/quark: use common Intel ACPI hardware definitions by Aaron Durbin · 8 years ago
  13. dc54270 soc/intel/quark: Pass in the memory initialization parameters by Lee Leahy · 8 years ago
  14. e98d72e soc/intel/quark: Remove use of PDAT.bin file by Lee Leahy · 8 years ago
  15. ce9e21a soc/intel/quark: Add C bootblock by Lee Leahy · 8 years ago
  16. 72179fa soc/intel/quark: Pass serial port address to FSP by Lee Leahy · 8 years ago
  17. bc518d5 quark: Enable HSUART0 as console by Lee Leahy · 8 years ago
  18. ac78db3 soc/intel/quark: Move UART init into romstage.c by Lee Leahy · 8 years ago
  19. 56c99f2 soc/intel/quark: Set temporary I2C base address by Lee Leahy · 8 years ago
  20. 7f4b053 soc/intel/quark: Clear SMI interrupts and wake events by Lee Leahy · 8 years ago
  21. 5ef051a soc/intel/quark: Add PCIe reset support by Lee Leahy · 8 years ago
  22. e1bff02 soc/intel/quark: Switch reference from uart_dev to uart_bdf by Lee Leahy · 8 years ago
  23. 3f0fe68 soc/intel/quark: Perform GPIO initialization by Lee Leahy · 8 years ago
  24. 4dd34ee soc/intel/quark: Add USB PHY initialization by Lee Leahy · 8 years ago
  25. eee0e229 soc/intel/quark: Remove UPD parameters by Lee Leahy · 8 years ago
  26. 019dbd3 soc/intel/quark: Fix MTRR reads by Lee Leahy · 8 years ago
  27. 50a8c8c soc/intel/quark: Fix uninitialized variable d_variant by Lee Leahy · 8 years ago
  28. d75ed0b soc/intel/quark: Disable the ROM shadow by Lee Leahy · 9 years ago
  29. d76d60b soc/intel/quark: Set the UPD values for MemoryInit by Lee Leahy · 9 years ago
  30. fba78bf soc/intel/quark: Split out MTRR support by Lee Leahy · 9 years ago
  31. 89c61b5 soc/intel/quark: Report CPU info by Lee Leahy · 9 years ago
  32. 43cdff6 soc/intel/quark: MTRR support by Lee Leahy · 9 years ago
  33. 318ef96 soc/intel/quark: FSP MemoryInit Support by Lee Leahy · 9 years ago
  34. 87df8d0 soc/intel/quark: Enable Serial Port by Lee Leahy · 9 years ago
  35. a7ba56e soc/intel/quark: Add TempRamInit support by Lee Leahy · 9 years ago
  36. 9fd0895 soc/intel/quark: Enable ESRAM by Lee Leahy · 9 years ago