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review.coreboot.org / coreboot / a50ced2eba20a007fa5b486c251c252ad09868cf
  1. 314dd0b Enable mahogany_fam10 and Kino family 10h to run the SB HT link at the expected HT3 frequency and width by matching the BUID swap list to the production BIOS. In addition, the BUID swap list has been moved into the project-specific file romstage.c for the other 13 AMD family 10h projects as well. For projects using a desktop AMD family 10h processor, pasting in the mahogany_fam10 swap list will likely allow HT3 operation. This should be confirmed on real hardware before commiting any swap list change. A different swap list will be needed for server projects. For serengeti_cheetah_fam10, a reference BIOS swap list to try is: 0x00, 0x0A, 0x00, 0x06, 0xFF, 0x0A, 0x06, 0xFF. by Scott Duplichan · 13 years ago
  2. 57205c7 Add option_table.h as dependency for all C based object files if option tables are used. by Patrick Georgi · 13 years ago
  3. 943b8b5 nvramtool: Change precedence order for data sources by Mathias Krause · 13 years ago
  4. fab35e3 Move cmos.default handling to bootblock by Patrick Georgi · 13 years ago
  5. 85e666d X60: add thermal zone 1 by Sven Schnelle · 13 years ago
  6. b641e98 X60: add thermal zone 0 by Sven Schnelle · 13 years ago
  7. 5fb8fc0 Add support for the NSC PC87364 Super I/O. by Michael Karcher · 13 years ago
  8. 09b3629 Add P-states for select Socket 754 processors. by Jonathan Kollasch · 14 years ago
  9. c9a08dd Redo r6099 after copy&pasted code reintroduced DIMMx #defines by Patrick Georgi · 14 years ago
  10. d5782f3 Correct off-by-one problem in AMD pre-rev-F model-F PowerNow code. by Jonathan Kollasch · 14 years ago
  11. fadb004 Improve ck804 IOAPIC and HPET resource handling. by Jonathan Kollasch · 14 years ago
  12. a73ffa0 Configure PCIe lanes on ms7135 as original BIOS does. by jakllsch · 14 years ago
  13. 071d835 add PC87384 SuperIO by Sven Schnelle · 14 years ago
  14. 7b9bbee Fixes licensing of src/southbridge/via/k8t890/k8x8xx.h to GPLv2+ from GPLv3. by Alexandru Gagniuc · 14 years ago
  15. 8241941 Fix some subsystemid statements in r6421 by Sylvain "ythier" Hitier · 14 years ago
  16. 5325a48 [SCONFIG] remove unused variable in inherit_subsystem_ids() by Sylvain "ythier" Hitier · 14 years ago
  17. b8269e2 Fix a simple whitespace error in src/include/device/device.h by Sven Schnelle · 14 years ago
  18. 750edfd Add lex output by Sven Schnelle · 14 years ago
  19. 9132102 Use subsystem id from devicetree.cb instead of Kconfig and move by Sven Schnelle · 14 years ago
  20. 270a908 Add subsystemid option to sconfig by Sven Schnelle · 14 years ago
  21. e38d0a6 Fix double inclusion of toplevel Makefile.inc by Patrick Georgi · 14 years ago
  22. 11ac1cf Mark non-returning function as noreturn to help some compiler versions by Patrick Georgi · 14 years ago
  23. 6eb6a7c libpayload: Add more libpci-compatibility (#defines) by Patrick Georgi · 14 years ago
  24. fb2d29e libpayload: Implement pci_cleanup() by Patrick Georgi · 14 years ago
  25. d08996e libpayload: Implement ffs() by Patrick Georgi · 14 years ago
  26. fa622fc Some more standard types and defines (libpayload) by Patrick Georgi · 14 years ago
  27. b1eab14 Add lib/ to the default library path of lpgcc, so -l works by Patrick Georgi · 14 years ago
  28. d175f44 add functions to set Subsystem Vendor/Device to rl5c746 by Sven Schnelle · 14 years ago
  29. b671172 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  30. 6bdc83b Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  31. 061c89e Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  32. c313210 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  33. 6276b6f Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  34. 82b241a Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  35. 5bcedee Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  36. ce62350 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  37. e80ce0a Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  38. 26f97d2 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  39. 19245c9 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  40. 9cbcf1a Kino devicetree.cb SIO PNP devices were not matched up with the by Marc Jones · 14 years ago
  41. e485aa4 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  42. 6fcc961 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  43. 1f93fea Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  44. 0e5d3e1 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  45. adb23a5 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  46. 1f4fffb Prepare for next patches (Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  47. f7ef421 Prepare for next patches (Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  48. d26e5e6 Prepare for next patches (Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  49. 40f9b4b0 Prepare for next patches (Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  50. 1d80e51 Prepare for next patches (Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  51. 9683b1d Prepare for next patches (Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  52. a5cbd25 Prepare for next patches (Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  53. d729459 Prepare for next patches (Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 14 years ago
  54. 70a3733 Add 300 MHz and 500 MHz HT frequency limits by Xavi Drudis Ferran · 14 years ago
  55. 4c28a6f Make AMD Fam10h CPU microcode updates optional in Expert mode by Xavi Drudis Ferran · 14 years ago
  56. 837403d Following patch fills in the callbacks for PCIe x16 resets. This board uses GPM8,GPM9 as reset toggles. by Rudolf Marek · 14 years ago
  57. 656060d Correct error in ASRock E350M1 commit that breaks build for ASRock 939a785gmh. by Scott Duplichan · 14 years ago
  58. 63896e7 Add support for the ASRock E350M1, an AMD family 14h Fusion board. by Scott Duplichan · 14 years ago
  59. 199c694 It adds support for automatic PSS object generation for AMD pre fam Fh CPU. Those CPUs require a hardcoded table, which I managed to rewrite during one particularly boring flight. Too pity it is only for Opteron CPUs. Someone needs to finish the second PDF for All others Athlons and Semprons. by Rudolf Marek · 14 years ago
  60. ed1d116 Add compile-time defaults to some K8 CMOS options in case they're absent in CMOS by Josef Kellermann · 14 years ago
  61. 855224b Add new option 'sata_mode' to CMOS and 'SATA_MODE' to Kconfig for AMD SB600 by Josef Kellermann · 14 years ago
  62. 20bd196 Tyan/s2735 doesn't need to define its own hard_reset function anymore. by Patrick Georgi · 14 years ago
  63. c977c7d libpayload: Move stdin/stdout/stderr away from headers by Patrick Georgi · 14 years ago
  64. a649a96 by Scott Duplichan · 14 years ago
  65. 71b8480 Move coreboot specific rules and setup to toplevel Makefile.inc by Patrick Georgi · 14 years ago
  66. 541269b [i945] Add SPD adress mapping by Sven Schnelle · 14 years ago
  67. 0c8e664 It turns out that the code which enables specific LDN is somewhat buggy. by Rudolf Marek · 14 years ago
  68. b8cdd9b Handle compiler options for source classes more generically by Patrick Georgi · 14 years ago
  69. 5826265 Make Makefile.inc parser loop more generic by Patrick Georgi · 14 years ago
  70. b159f7a add mec1308 support to superiotool by David Hendricks · 14 years ago
  71. 650cf23 Fix build errors introduced in r6367 by Alexandru Gagniuc · 14 years ago
  72. e8a7df8 Add ACPI code for Lenvo X60 by Sven Schnelle · 14 years ago
  73. 025ead7 Extended K8T890 driver to include the K8T800 and K8M800 northbridges by Alexandru Gagniuc · 14 years ago
  74. ddb3f0a Lenovo ThinkPad X60: Enable SMI handler by Sven Schnelle · 14 years ago
  75. 7afbb99 Remove more files and lines mistakenly copied from Roda to X60 by Peter Stuge · 14 years ago
  76. 7d5966d Remove ACPI mistakenly copied from Roda to ThinkPad X60 by Peter Stuge · 14 years ago
  77. 1c427a7 Remove Inagua Kconfig items for external VGA and AHCI binaries. These can be addded by the developer if needed. by Marc Jones · 14 years ago
  78. dd6c1e6 SERIAL_POST was renamed to CONSOLE_POST a while ago by Stefan Reinauer · 14 years ago
  79. f58b63d use git.seabios.org for checking out seabios. by Stefan Reinauer · 14 years ago
  80. e2ca71e Lenovo ThinkPad X60 / X60s Support by Sven Schnelle · 14 years ago
  81. b912289 Use fprintf(stderr, ...) in library by Patrick Georgi · 14 years ago
  82. cd913bd Stub out FILE*, stdout/stdin/stderr and implement fprintf on these by Patrick Georgi · 14 years ago
  83. a4a022c lpgcc was too noisy in some cases by Patrick Georgi · 14 years ago
  84. 6b5ca4e Some more POSIX compatibility by Patrick Georgi · 14 years ago
  85. f0ccf6e Errata #169 works on HT, not MC by Josef Kellermann · 14 years ago
  86. cf37a59 Removed LPC DMA Deadlock workaround... by Josef Kellermann · 14 years ago
  87. 144fe88 Fix Typo. (and why is that file, and some of its siblings per-board?) by Patrick Georgi · 14 years ago
  88. 69da1b6 Add IBASE DB-FT1 and AMD Inagua motherboards. Patch 8 of 8. by Frank Vibrans · 14 years ago
  89. 7b904d8 This code provides support for the superio chip on the AMD Inagua platform (not commercially available). It is independent of the AMD>code. by Frank Vibrans · 14 years ago
  90. 6b4674e I missed a file that was part of the AMD AGESA CPU wrapper checkin, r6347. by Frank Vibrans · 14 years ago
  91. d0a8ebf This code provides support for the superio chip on the IBASE Technology DB-FT1 (AMD code name Persimmon) platform. It is independent of the AMD code. by Frank Vibrans · 14 years ago
  92. 0822ad8 This code fixes a number of build issues related to the AMD Agesa code. The particular issues are global variables existing in romstage and the use of GCC intrinsics in the build. The former issue will be addressed shortly, and the latter issue requires community assistance. This code is dependent on the AMD Family 14h mainboard code. by Frank Vibrans · 14 years ago
  93. 420faca Add AMD cpu wrapper code. Patch 4 of 8. by Frank Vibrans · 14 years ago
  94. 63e62b0 This code provides southbridge initialization for SB800 south bridges. It is dependent on the AMD CIMx/SB800 code. by Frank Vibrans · 14 years ago
  95. 39fca80 This code provides cpu northbridge initialization for Family 14h cpus. It is dependent on the AMD Agesa code. by Frank Vibrans · 14 years ago
  96. 2b4c831 Add AMD Agesa and AMD CIMx SB800 code. Patch 1 of 8. by Frank Vibrans · 14 years ago
  97. 74ad66c Attached patch fixes the LPC decode ranges of SB600/SB800. We enable early only Serial/SIO/RTC. by Rudolf Marek · 14 years ago
  98. daecb18 According to AMD documentation, cache type WP should be used for by Scott Duplichan · 14 years ago
  99. 20ecc5a RS690: Provide support for MMCONF. by Josef Kellermannseppk · 14 years ago
  100. 1df8542 Implemented workaround for erratum 169, obsoleting erratum 131. by Alexandru Gagniuc · 14 years ago