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review.coreboot.org / coreboot / a342f3937e7ce159fd170ab8cd26ba799a3bc9e4 / src / northbridge / intel / sandybridge / raminit_ivy.c
  1. a342f39 src: Remove unneeded whitespace by Elyes HAOUAS · 6 years ago
  2. f369e60 northbridge/intel: Remove unneeded includes by Elyes HAOUAS · 6 years ago
  3. dabebc3 nb/intel/sandybridge: support more XMP timings by Dan Elkouby · 6 years ago
  4. 9ed74b5 nb/intel/ivybridge: Improve CAS freq selection by Arthur Heymans · 7 years ago
  5. cb7d6a1 nb/intel/sandybridge/raminit: Add default values by Patrick Rudolph · 8 years ago
  6. cab4d3d nb/intel/sandybridge/raminit: Add 100MHz refclock support by Patrick Rudolph · 8 years ago
  7. 77eaba3 nb/intel/sandybridge/raminit: Use Ivy Bridge specific values by Patrick Rudolph · 8 years ago
  8. 50db9c9 nb/intel/sandybridge: Use DIV_ROUND_UP macro to select timings by Arthur Heymans · 7 years ago
  9. 305035c nb/intel/sandybridge/raminit: Separate Sandybridge and Ivybridge by Patrick Rudolph · 8 years ago