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review.coreboot.org / coreboot / a0bec1745560492ec56d6149bcf3d3d0dcf3ccda / src / southbridge / intel / bd82x6x / lpc.c
  1. a0bec17 Reserve bd82x6x LPC decode ranges in the resource allocator by Marc Jones · 12 years ago
  2. 800e950 ELOG: Log boot-time events found in southbridge by Duncan Laurie · 12 years ago
  3. e6f459c CougarPoint/PantherPoint: Add HM77 device ID to table by Kimarie Hoot · 12 years ago
  4. 3f6a4d7 Add specific power management init code for PantherPoint by Duncan Laurie · 12 years ago
  5. 9a380ab bd82x6x: Convert all PCI ID lists to new scheme by Stefan Reinauer · 12 years ago
  6. baae2d2 Add support for HM70 and NM70 LPC bridge by Stefan Reinauer · 12 years ago
  7. 95be1d6 Don't disable ACPI in the S3 resume path by Duncan Laurie · 12 years ago
  8. 459b777 add new LPC controller device ID value by Vadim Bendebury · 12 years ago
  9. 8e07382 Add support for Intel Panther Point PCH by Stefan Reinauer · 12 years ago