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review.coreboot.org / coreboot / 98c92570d9bb363740ae1b2cbbefc3c0f2404cb4 / src / mainboard / lenovo / thinkcentre_a58 / devicetree.cb
  1. 98c9257 cpu/intel/speedstep: Have nb and sb code provide c5/c6/slfm by Arthur Heymans · 1 year, 8 months ago
  2. dc3beea sb/intel/i82801gx: Use boolean for ide_enable_{primary,secondary} by Elyes Haouas · 1 year, 8 months ago
  3. 1eecb8c nb/intel/x4x: Hook up PCI domain and CPU bus ops to devicetree by Arthur Heymans · 1 year, 8 months ago
  4. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 2 months ago
  5. 674ad92 src/mainboard: Replace GPLv2 long form headers with SPDX header by Elyes HAOUAS · 4 years, 2 months ago
  6. 078bc41 mainboard/[g-p]*: Remove copyright notices by Patrick Georgi · 4 years, 4 months ago
  7. 4ed2598 mb/lenovo/*/devicetree: Declare device in one line if possible by Peter Lemenkov · 4 years, 5 months ago
  8. fecf777 sb/intel/i82801gx: Add common LPC decode code by Arthur Heymans · 4 years, 8 months ago
  9. 5eb81be sb/intel/i82801gx: Detect if the southbridge supports AHCI by Arthur Heymans · 6 years ago
  10. fbf380a mb/*/devicetree.cb: Remove unavailable PCIe ports by Arthur Heymans · 6 years ago
  11. a1e46ae mb/lenovo/thinkcentre_a58: Add mainboard by Arthur Heymans · 6 years ago