1. 98c9257 cpu/intel/speedstep: Have nb and sb code provide c5/c6/slfm by Arthur Heymans · 1 year, 8 months ago
  2. dc3beea sb/intel/i82801gx: Use boolean for ide_enable_{primary,secondary} by Elyes Haouas · 1 year, 8 months ago
  3. 1eecb8c nb/intel/x4x: Hook up PCI domain and CPU bus ops to devicetree by Arthur Heymans · 1 year, 8 months ago
  4. 50863da src/mainboard to src/security: Fix spelling errors by Martin Roth · 2 years, 10 months ago
  5. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 2 months ago
  6. 674ad92 src/mainboard: Replace GPLv2 long form headers with SPDX header by Elyes HAOUAS · 4 years, 2 months ago
  7. 3b618bb mainboard/[a-f]*: Remove copyright notices by Patrick Georgi · 4 years, 4 months ago
  8. fecf777 sb/intel/i82801gx: Add common LPC decode code by Arthur Heymans · 4 years, 8 months ago
  9. 5eb81be sb/intel/i82801gx: Detect if the southbridge supports AHCI by Arthur Heymans · 6 years ago
  10. fbf380a mb/*/devicetree.cb: Remove unavailable PCIe ports by Arthur Heymans · 6 years ago
  11. b9d2589 mb/*/*: Harmonise FD and devicetree on boards featuring ICH7 by Arthur Heymans · 6 years ago
  12. 967b84d src/mainboard: Remove unneeded whitespace by Elyes HAOUAS · 6 years ago
  13. 33fa95c mb/asrock/g41c-gs: Add more buildin PCI devices to the devicetree by Arthur Heymans · 6 years ago
  14. b7ff886 mb/asrock/g41c-gs: Add g41m-gs variant by Arthur Heymans · 7 years ago