- 98c9257 cpu/intel/speedstep: Have nb and sb code provide c5/c6/slfm by Arthur Heymans · 1 year, 9 months ago
- dc3beea sb/intel/i82801gx: Use boolean for ide_enable_{primary,secondary} by Elyes Haouas · 1 year, 9 months ago
- 1eecb8c nb/intel/x4x: Hook up PCI domain and CPU bus ops to devicetree by Arthur Heymans · 1 year, 9 months ago
- 50863da src/mainboard to src/security: Fix spelling errors by Martin Roth · 2 years, 11 months ago
- 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 3 months ago
- 674ad92 src/mainboard: Replace GPLv2 long form headers with SPDX header by Elyes HAOUAS · 4 years, 3 months ago
- 09481b1 mainboard/asrock: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 5 months ago
- 3b618bb mainboard/[a-f]*: Remove copyright notices by Patrick Georgi · 4 years, 5 months ago
- fecf777 sb/intel/i82801gx: Add common LPC decode code by Arthur Heymans · 4 years, 9 months ago
- 5eb81be sb/intel/i82801gx: Detect if the southbridge supports AHCI by Arthur Heymans · 6 years ago
- fbf380a mb/*/devicetree.cb: Remove unavailable PCIe ports by Arthur Heymans · 6 years ago
- b9d2589 mb/*/*: Harmonise FD and devicetree on boards featuring ICH7 by Arthur Heymans · 6 years ago
- 2e3c880 mb/asrock/g41c-gs: Link separate gpio.c files by Arthur Heymans · 6 years ago
- 33fa95c mb/asrock/g41c-gs: Add more buildin PCI devices to the devicetree by Arthur Heymans · 6 years ago
- e98f305 mb/asrock/g41c-gs: Add the revision 1 variant by Arthur Heymans · 7 years ago