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review.coreboot.org / coreboot / 9802f1ee546478eec5dd94817ec9b0070e7ae23d / util / riscv
  1. 0ad5fbd util: Update all shebangs to use /usr/bin/env by Martin Roth · 3 years, 7 months ago
  2. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 2 months ago
  3. 7333a11 util/: Replace GPLv2 boiler plate with SPDX header by Patrick Georgi · 4 years, 2 months ago
  4. ea063cb AUTHORS, util/: Drop individual copyright notices by Patrick Georgi · 4 years, 2 months ago
  5. 7db270c riscv: fix bug of sifive-gpt.py by Xiang Wang · 6 years ago
  6. c2e4941 treewide: use /usr/bin/env where appropriate by Yegor Timoshenko · 6 years ago
  7. 2326a28 riscv: add trampoline in MBR block to support boot mode 1 by Philipp Hug · 6 years ago
  8. 8ba9e8c util: Add description.md to each util by Tom Hiller · 6 years ago
  9. 55b4645 src/sifive: Add the SiFive Freedom Unleashed 540 SoC by Jonathan Neuschäfer · 6 years ago
  10. f2b4993 util/riscvtools: Rename to util/riscv/ by Jonathan Neuschäfer · 6 years ago