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26b00e6
Refactor some alignment handling
by Patrick Georgi
· 12 years ago
d6e4d51
Revert wbind added to the reset_vector
by Marc Jones
· 12 years ago
77e4f7d
Intel e7505: refactor only
by Kyösti Mälkki
· 12 years ago
d1edb17
Fix the blank in acpi_tables.c
by zbao
· 12 years ago
a20132b
Do not produce temp s3.rom if the board doesn't need it.
by zbao
· 12 years ago
2132005
Fix messy code in ALIB creation
by zbao
· 12 years ago
585a400
Leverage the Pstate table created by AGESA.
by zbao
· 12 years ago
3f788e1
S3: Use old heap during normal boot
by zbao
· 12 years ago
899608d
Fix the blank in acpi_tables.c
by zbao
· 12 years ago
26c7b86
Intel e7505: handlers for undocumented registers
by Kyösti Mälkki
· 12 years ago
ad8c95f
kconfig: Improve 'General setup' menu docs.
by Uwe Hermann
· 12 years ago
e380b0f
More portable s3 scratch space creation
by Patrick Georgi
· 12 years ago
f543c7b
S3 code in the mainboard.
by zbao
· 12 years ago
f722373
S3 code in coreboot public folder.
by zbao
· 12 years ago
caf494c8
ACPI HEST table.
by zbao
· 12 years ago
a4fa814
cmos.layout: Remove invalid warning
by Vikram Narayanan
· 12 years ago
a85ca49
Bifferboard: Fix MAINBOARD_PART_NUMBER.
by Uwe Hermann
· 12 years ago
3aff1a3
Convert AOpen DXPL Plus mainboard to CAR
by Kyösti Mälkki
· 12 years ago
eb59636
Add support for aligned allocation
by Ron Minnich
· 12 years ago
3925622
S3 code in vendorcode folder.
by zbao
· 12 years ago
9bcdbf8
Add Southbridge support for S3.
by zbao
· 12 years ago
2c2e78d
Unify IO APIC address specification
by Patrick Georgi
· 13 years ago
5c1ff92
Intel e7505: cleanups
by Kyösti Mälkki
· 12 years ago
5bd271b
Intel e7505: renames only
by Kyösti Mälkki
· 12 years ago
05758bd
Remove obsolete empy macro definition
by Ron Minnich
· 12 years ago
14233a0
Actually return %ebx value from cpuid_ebx()
by Jonathan A. Kollasch
· 12 years ago
e875328
Remove Dell s1850
by Ron Minnich
· 12 years ago
d3801f4
Add support for SMSC MEC1308/1310 SuperI/O EC
by Stefan Reinauer
· 12 years ago
6626d6a
Add initial support for SMSC SIO1007 SuperI/O chip
by Stefan Reinauer
· 12 years ago
8198600
Add support for SMSC LPC47N207 SuperI/O chip
by Stefan Reinauer
· 12 years ago
2bdfb48
Fixes and Sandybridge support for lapic cpu init
by Stefan Reinauer
· 12 years ago
f8c7c23
Fix support for RAM-less multi-processor init
by Kyösti Mälkki
· 12 years ago
334532e
Add Sandybridge/Cougar Point support to SMM relocation handler
by Stefan Reinauer
· 12 years ago
c00dfbc
Cache 8MB flash instead of 4MB
by Stefan Reinauer
· 12 years ago
6293d30
Factor out function to find driver for a CPU
by Stefan Reinauer
· 12 years ago
61f4a74
Add constants for fast path resume copying
by Stefan Reinauer
· 12 years ago
5b6404e
Fix timer frequency detection on Sandybridge
by Stefan Reinauer
· 12 years ago
cab72d9
amdfam10: add phenom II as known cpu
by Bernhard Urban
· 12 years ago
deda997
Invalidate cache before first jump
by Stefan Reinauer
· 12 years ago
c6b2166
smbios: Don't fill out firmware version on ChromeOS
by Stefan Reinauer
· 12 years ago
31324c6
Fill out ChromeOS specific coreboot table extensions
by Stefan Reinauer
· 12 years ago
8c5b58e
Update documentation in smmrelocate.S to mention TSEG
by Stefan Reinauer
· 12 years ago
5c55463
Add support for Intel Sandybridge CPU
by Stefan Reinauer
· 12 years ago
00636b0
Add support for Intel Sandybridge CPU (northbridge part)
by Stefan Reinauer
· 12 years ago
fb89dd0
Use fast memset in SMM mode, too
by Stefan Reinauer
· 12 years ago
8e07382
Add support for Intel Panther Point PCH
by Stefan Reinauer
· 12 years ago
cb91e15
Add support for mainboard specific suspend/resume handler
by Stefan Reinauer
· 12 years ago
ec20763
Move TPM code to romstage
by Stefan Reinauer
· 12 years ago
1551183
Drop verified boot code from acpi.c
by Stefan Reinauer
· 12 years ago
3aa067f
Add support to run SMM handler in TSEG instead of ASEG
by Stefan Reinauer
· 12 years ago
f17789c
Don't unconditionally show ChromeOS options
by Stefan Reinauer
· 12 years ago
ea37a21
Add support for Intel Turbo Boost feature
by Stefan Reinauer
· 12 years ago
3d7c677
smbios: add support for onboard devices extended information
by Stefan Reinauer
· 12 years ago
abdf15f
Apply cache-as-ram conditionally on socket mPGA604
by Kyösti Mälkki
· 12 years ago
afd141d
S3 code whitespaces changes.
by zbao
· 12 years ago
01bd79f
Add sb800 spi support.
by zbao
· 12 years ago
971804e
x86, oprom: ensure DF is always cleared
by Mathias Krause
· 12 years ago
74a0efe
[ChromeOS] Don't initialize VGA Option ROM in normal mode
by Stefan Reinauer
· 12 years ago
020b22a
Add EC component for SMSC MEC1308/1310
by Stefan Reinauer
· 12 years ago
b0dd1d9
Add support for ITE IT8772F SuperI/O chip
by Stefan Reinauer
· 12 years ago
dc8448fd
Add a helper function to determine the number of enabled CPUs
by Stefan Reinauer
· 12 years ago
d40393e
Align: Make sure 1 is treated as unsigned long instead of int
by Stefan Reinauer
· 12 years ago
9aea04a
Add Google ChromeOS vendor support
by Stefan Reinauer
· 12 years ago
dd30acd
Fix issues with x86 memcpy
by Mathias Krause
· 12 years ago
819c7d4
Whitespace fixes
by Patrick Georgi
· 12 years ago
a860c68
Intel cpus: get MAXPHYADDR at runtime for new CAR
by Kyösti Mälkki
· 12 years ago
0078ceb
Intel cpus: add hyper-threading CPU support to new CAR
by Kyösti Mälkki
· 12 years ago
05d6ffb
Intel cpus: improve CPU compatibility of new CAR
by Kyösti Mälkki
· 13 years ago
7dfe32c
Add support for RAM-less multi-processor init
by Kyösti Mälkki
· 13 years ago
f9d1a42
Intel cpus: apply some good programming practices in new CAR
by Kyösti Mälkki
· 12 years ago
325b92f
Intel cpus: cache actual size of the Flash ROM device
by Kyösti Mälkki
· 12 years ago
5a660ca
Intel cpus: copy model_6ex CAR code
by Kyösti Mälkki
· 12 years ago
d842f1f
Makefile: rename romstage linking filenames
by Kyösti Mälkki
· 12 years ago
a01ec14
Makefile: split romstage linking to separate rules
by Kyösti Mälkki
· 12 years ago
608d15b
Fix coreboot makefiles not to produce half baked output.
by Kyösti Mälkki
· 12 years ago
5fdc00a
Drop obsolete TINY_BOOTBLOCK
by Kyösti Mälkki
· 12 years ago
8acbc2a
use movsl for copying resume memory back
by Stefan Reinauer
· 13 years ago
77adc5e
Don't unconditionally add support for cardbus and pci-x devices
by Stefan Reinauer
· 13 years ago
dfb098d
Add DEBUG_TPM option to Debugging menu
by Stefan Reinauer
· 13 years ago
7b67892
Make MTRR min hole alignment 64MB
by Duncan Laurie
· 13 years ago
527fc74
Fix MB calculation in the reporting of the MTRR hole
by Duncan Laurie
· 13 years ago
7389fa9
MTRR: add alternate allocation method for odd memory maps
by Duncan Laurie
· 13 years ago
67e6c2a
Don't re-init EBDA in S3 resume path.
by Duncan Laurie
· 13 years ago
b4aaaa7
Prepare the BIOS data areas before device init.
by Duncan Laurie
· 13 years ago
1d0b1d4
vga_io.c is not needed unless CONFIG_VGA is set
by Stefan Reinauer
· 13 years ago
8bb7723
Add Kconfig options to enable TSEG and set a size
by Duncan Laurie
· 13 years ago
689e31d
Make cpuid functions usable when compiled with PIC
by Duncan Laurie
· 13 years ago
67aa3d6
drop use of MAX_PHYSICAL_CPUS and MAX_CPUS where not needed
by Stefan Reinauer
· 13 years ago
5e02bc6
Make PCI CONF2 support a compile time option
by Stefan Reinauer
· 13 years ago
bf729ba
Add more timestamps in coreboot.
by Stefan Reinauer
· 13 years ago
10fea92
Fix coreboot makefiles not to produce half baked output.
by Vadim Bendebury
· 13 years ago
cde7801
Add timestamps for selfboot and acpi wake
by Duncan Laurie
· 13 years ago
c668af7
Make TPM driver work in rom stage.
by Stefan Reinauer
· 13 years ago
3008bbad
Add TPM support to coreboot
by Stefan Reinauer
· 13 years ago
b89a761
Add Google ChromeOS vendorcode directory
by Stefan Reinauer
· 12 years ago
00093a8
Add an option to keep the ROM cached after romstage
by Stefan Reinauer
· 13 years ago
1afe51a
Add native memset() function on x86
by Stefan Reinauer
· 13 years ago
0054afa
Add faster, architecture dependent memcpy()
by Stefan Reinauer
· 13 years ago
19e7e7d
Add infrastructure for global data in the CAR phase of boot
by Gabe Black
· 13 years ago
4d04a71
Detect whether the OXPCIE card is really present while in the ROM stage.
by Gabe Black
· 13 years ago
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