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review.coreboot.org / coreboot / 9631016660423d0585a1 / src / southbridge / intel / fsp_rangeley / spi.c
  1. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  2. 5856240 Revert "Remove FSP Rangeley SOC and mohonpeak board support" by Martin Roth · 9 years ago
  3. 959478a Remove FSP Rangeley SOC and mohonpeak board support by Alexandru Gagniuc · 9 years ago
  4. 4460703 Drop "See file CREDITS..." comment by Stefan Reinauer · 9 years ago
  5. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  6. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  7. ec9293f spi: Eliminate the spi_cs_activate and spi_cs_deactivate functions. by Gabe Black · 10 years ago
  8. 87f3b4e spi: Remove the spi_set_speed and spi_cs_is_valid functions. by Gabe Black · 10 years ago
  9. 829c41d southbridge/intel: Add fsp_rangeley support by Martin Roth · 10 years ago