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review.coreboot.org / coreboot / 9631016660423d0585a1 / src / southbridge / amd / sb800 / lpc.c
  1. 1eaaa0e southbridge/amd/sr5650: Add MCFG ACPI table support by Timothy Pearson · 9 years ago
  2. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  3. d0e212c devicetree: Discriminate device ops scan_bus() by Kyösti Mälkki · 9 years ago
  4. 83f81ca acpi: Remove monolithic ACPI by Vladimir Serbinenko · 10 years ago
  5. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  6. 03abaee21 drivers/pc80/mc146818rtc: Assume we always have ALTCENTURY by Gabe Black · 10 years ago
  7. dcf253c southbridge/amd sb600, sb700 & sb900 spelling fixes by Martin Roth · 10 years ago
  8. 2a19fb1 amdfam10: Move to per-device ACPI by Vladimir Serbinenko · 10 years ago
  9. b3f08c6 cmos: Rename the CMOS related functions. by Gabe Black · 10 years ago
  10. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  11. 5079a0d Remove assembly coded log2 function by Ronald G. Minnich · 12 years ago
  12. 366f0fc AMD SB: Call the rtc update if needed (Propagation) by zbao · 12 years ago
  13. 2c2e78d Unify IO APIC address specification by Patrick Georgi · 13 years ago
  14. 74ad66c Attached patch fixes the LPC decode ranges of SB600/SB800. We enable early only Serial/SIO/RTC. by Rudolf Marek · 14 years ago
  15. d098575 This sb800 code is derived from sb700. by Zheng Bao · 14 years ago