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review.coreboot.org / coreboot / 9631016660423d0585a1 / src / northbridge / via / cn700 / raminit.c
  1. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  2. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  3. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  4. 65b72ab northbridge: Drop print_ implementation from non-romcc boards by Stefan Reinauer · 10 years ago
  5. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  6. 89fcdec Fix compilation of VIA CN700 northbridge code with gcc 4.6 by Stefan Reinauer · 13 years ago
  7. d4814bd more ifdef -> if fixes by Stefan Reinauer · 13 years ago
  8. f976548 Clarify a comment on an old hack, remove the call to early_mtrr_init by Corey Osgood · 14 years ago
  9. 14e2277 Since some people disapprove of white space cleanups mixed in regular commits by Stefan Reinauer · 14 years ago
  10. 6a445e8 zero warning days. by Stefan Reinauer · 14 years ago
  11. 64ed2b7 Drop \r\n and \n\r as both print_XXX and printk now do this internally. by Stefan Reinauer · 14 years ago
  12. 01ce601 This patch is from 2009-10-20 by Uwe Hermann · 14 years ago
  13. ea7b518 Indent-based + manual cleanups for CN700 (trivial). As this will be ported by Uwe Hermann · 16 years ago
  14. d4759d0 This patch gets the Epia-CN working without ACPI or APIC. by Bari Ari · 16 years ago
  15. fcb2a31 Add support for the VIA EPIA-CN baord, which uses C7 + CN700 + VT8237R. by Aaron Lwe · 16 years ago
  16. bd3f93e Add support for the Via CN700 with a C7 CPU and DDR2 RAM. Only a single DIMM is by Corey Osgood · 17 years ago