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review.coreboot.org / coreboot / 9631016660423d0585a1 / src / include / device / pciexp.h
  1. 580e722 devicetree: Change scan_bus() prototype in device ops by Kyösti Mälkki · 9 years ago
  2. de271a8 PCI subsystem: Drop parameter max from scan_bus by Kyösti Mälkki · 9 years ago
  3. 31c6e63 PCIe: Add L1 Sub-State support. by Kenji Chen · 10 years ago
  4. 90dcdd4 Add support for enabling PCIe Common Clock and ASPM by Duncan Laurie · 13 years ago
  5. d453dd0 Cosmetics and coding style fixes in devices/*. by Uwe Hermann · 14 years ago
  6. 14e2277 Since some people disapprove of white space cleanups mixed in regular commits by Stefan Reinauer · 14 years ago
  7. 13f1c2a eric patch by Yinghai Lu · 19 years ago