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review.coreboot.org / coreboot / 9631016660423d0585a1 / src / cpu / intel / model_206ax
  1. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  2. 0ace013 sandybridge: Disable parallel CPU initialization by Nico Huber · 9 years ago
  3. 86091f9 cpu/mtrr.h: Fix macro names for MTRR registers by Alexandru Gagniuc · 9 years ago
  4. 1d85700 cpu: microcode: Use microcode stored in binary format by Alexandru Gagniuc · 9 years ago
  5. 439356f x86: remove cpu_incs as romstage Make variable by Aaron Durbin · 9 years ago
  6. df20506 Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in Kconfig by Martin Roth · 9 years ago
  7. 4a45ec4 x86: Drop -Wa,--divide by Stefan Reinauer · 9 years ago
  8. efc01f0 model_206ax: Fix APIC map when HT is disabled. by Vladimir Serbinenko · 9 years ago
  9. c16e9dfa Create i945-ivy smm tseg init based on ivy code. by Vladimir Serbinenko · 9 years ago
  10. 5264862 Remove empty lines at end of file by Elyes HAOUAS · 9 years ago
  11. 5eea458 device_ops: add device_t argument to acpi_fill_ssdt_generator by Alexander Couzens · 9 years ago
  12. 09b20cd Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  13. 44cbe10 smm: Merge configs SMM_MODULES and SMM_TSEG by Vladimir Serbinenko · 9 years ago
  14. a3e41c0 Migrate 206ax to SMM_MODULES by Vladimir Serbinenko · 9 years ago
  15. 5477dca intel: Remove pstate_coord_type. by Vladimir Serbinenko · 9 years ago
  16. 9bb5c5c acpigen: Remove all explicit length tracking by Vladimir Serbinenko · 10 years ago
  17. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  18. e7366da Include back the 306ax microcode again. by Vladimir Serbinenko · 9 years ago
  19. 26e24cc 3rdparty: move to 3rdparty/blobs by Patrick Georgi · 9 years ago
  20. f4f0287 3rdparty: Move to blobs by Patrick Georgi · 9 years ago
  21. 5818da2 cpu/intel: (non-FSP) Remove microcode updates from tree by Alexandru Gagniuc · 11 years ago
  22. ee89435 cpu/intel (non-FSP): Use microcode from blobs repository by Alexandru Gagniuc · 11 years ago
  23. 033bb4b acpi: Generate valid ACPI processor objects by Timothy Pearson · 9 years ago
  24. f251a6d cpu/intel: >= nehalem: add comments to msr finalize's by Alexander Couzens · 9 years ago
  25. 77b1655 vboot2: add verstage by Stefan Reinauer · 10 years ago
  26. dafa12a intel/model_206ax: update microcode by Nicolas Reinecke · 10 years ago
  27. 546953c Replace hlt with halt() by Patrick Georgi · 10 years ago
  28. 80fb8ed acpigen: Add and use acpigen_write_method. by Vladimir Serbinenko · 10 years ago
  29. 226d784 ibexpeak, bd82x6x: Move to implicit length patching by Vladimir Serbinenko · 10 years ago
  30. 2c9d2cf {arch,cpu,drivers,ec}: Don't hide pointers behind typedefs by Edward O'Callaghan · 10 years ago
  31. 1729cd8 x86 romstage: Move stack just below RAMTOP by Kyösti Mälkki · 10 years ago
  32. 822bc65 ACPI: Remove CONFIG_GENERATE_ACPI_TABLES by Vladimir Serbinenko · 11 years ago
  33. 9944b28 cpu/intel/XXX/acpi.c: Fix coding style violation by Martin Roth · 10 years ago
  34. 5cfef13 cpu/intel: Fix out-of-bounds read due to off-by-one in condition by Edward O'Callaghan · 10 years ago
  35. f7c55148 cpu: Trivial - drop trailing blank lines at EOF by Edward O'Callaghan · 10 years ago
  36. ba92428 intel: Make monotonic timer a first class citizen by Edward O'Callaghan · 10 years ago
  37. 5c3f384 Replace SERIAL_CPU_INIT with PARALLEL_CPU_INIT by Kyösti Mälkki · 10 years ago
  38. 99ac98f Introduce stage-specific architecture for coreboot by Furquan Shaikh · 10 years ago
  39. fd33781 Move ARCH_* from board/Kconfig to cpu or soc Kconfig. by Furquan Shaikh · 10 years ago
  40. 20f25dd Rename coreboot_ram stage to ramstage by Furquan Shaikh · 10 years ago
  41. 2c78726 PCI: Drop includes under cpu by Kyösti Mälkki · 10 years ago
  42. 9c70adf intel/microcode: Remove leftover MICROCODE_INCLUDE_PATH. by Vladimir Serbinenko · 10 years ago
  43. 07d881a0 cpu/intel: Remove dummy terminators from microcode blobs by Alexandru Gagniuc · 11 years ago
  44. bbf013c nehalem/sandy/ivy/haswell: Enable WRPROT cache for all of flash by Kyösti Mälkki · 11 years ago
  45. 107f72e Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR by Kyösti Mälkki · 11 years ago
  46. 66e0c4c cpu: Rename CPU_MICROCODE_IN_CBFS to SUPPORT_CPU_UCODE_IN_CBFS by Alexandru Gagniuc · 11 years ago
  47. 4c3ab73 cpu: Fix spelling by Martin Roth · 11 years ago
  48. 2c516ed usbdebug: Drop old includes by Kyösti Mälkki · 11 years ago
  49. 8ee04d7 usbdebug: Put ehci_debug_info in CAR_GLOBAL by Kyösti Mälkki · 11 years ago
  50. e49679d usbdebug: Drop temporary disables of log output by Kyösti Mälkki · 11 years ago
  51. 3f5f6d8 Drop prototype guarding for romcc by Stefan Reinauer · 11 years ago
  52. 648d166 copy_and_run: drop boot_complete parameter by Stefan Reinauer · 11 years ago
  53. 24d1d4b x86: Unify arch/io.h and arch/romcc_io.h by Stefan Reinauer · 11 years ago
  54. 2c3f161 Intel: Update CPU microcode for Sandybridge/Ivybridge CPUs by Stefan Reinauer · 11 years ago
  55. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  56. 644e83b speedstep: Deduplicate some MSR identifiers by Patrick Georgi · 11 years ago
  57. 223af0d document Intel VMX locking behavior by Mike Frysinger · 11 years ago
  58. 23f38cd Get rid of drivers class by Patrick Georgi · 12 years ago
  59. 455f4b4 Fix CONFIG_MAX_CPU set to 1 CPU build problem by Stefan Reinauer · 12 years ago
  60. 08067ba ivybridge: Catch unknown CPU revisions by Stefan Reinauer · 12 years ago
  61. f5a11aa Initialize the VMX MSR by Marc Jones · 12 years ago
  62. 5986eda Revert "Remove code that enables/disables VMX in coreboot on chromebooks." by Marc Jones · 12 years ago
  63. bb9dff5 sandybridge: Correct reporting of cores and threads by Stefan Reinauer · 12 years ago
  64. d16d576 Leave power control registers unlocked by Sameer Nanda · 12 years ago
  65. 41392df Merge cpu/intel/acpi.h into cpu/intel/speedstep.h by Nico Huber · 12 years ago
  66. 00b579a buildsystem: Make CPU microcode updating more configurable by Alexandru Gagniuc · 12 years ago
  67. fee73df Auto-declare chip_operations by Kyösti Mälkki · 12 years ago
  68. 0db6820 Synchronize rdtsc instructions by Stefan Reinauer · 12 years ago
  69. 51676b1 Revert "Use broadcast SIPI to startup siblings" by Sven Schnelle · 12 years ago
  70. a2701c6 Revert "remove CONFIG_SERIAL_CPU_INIT" by Sven Schnelle · 12 years ago
  71. 5563211 CPU: Add option to set TCC activation offset by Duncan Laurie · 12 years ago
  72. d6aca0b ACPI: Add a method to notify OS to re-read _PPC by Duncan Laurie · 12 years ago
  73. 0eefa00 ACPI: Add function to write _PPC using NVS by Duncan Laurie · 12 years ago
  74. 0b7b7b6 Drop CONFIG_CPU_MODEL_NAME and fix CPU name displayed in logs by Stefan Reinauer · 12 years ago
  75. c65a36e Enable Microcode in CBFS for all SandyBridge/IvyBridge systems by Stefan Reinauer · 12 years ago
  76. c0f2cfb Fix comment to reference IvyBridge, too by Stefan Reinauer · 12 years ago
  77. 6d29c73 Include SandyBridge Microcode when IvyBridge is enabled by Stefan Reinauer · 12 years ago
  78. 22935e1 CPU: Set flex ratio to nominal TDP ratio in bootblock by Duncan Laurie · 12 years ago
  79. 4e4320f CPU: Update ivybridge PP1 current limit value by Duncan Laurie · 12 years ago
  80. 77dbbac CPU: Add basic support for Nominal Configurable TDP by Duncan Laurie · 12 years ago
  81. 999e94c Config changes to support microcode in CBFS by Vadim Bendebury · 12 years ago
  82. 537b4e0 Add code to read Intel microcode from CBFS by Vadim Bendebury · 12 years ago
  83. df0c822 Rename microcode include file to be model agnostic by Vadim Bendebury · 12 years ago
  84. b38e0c3 Properly identify ACPI C3 states in _CST table. by Duncan Laurie · 12 years ago
  85. 305b19d Remove code that enables/disables VMX in coreboot on chromebooks. by Ronald G. Minnich · 12 years ago
  86. 5458b9d Intel cpus: Extend cache to cover complete Flash Device by Kyösti Mälkki · 12 years ago
  87. c7fb2ae Intel cpus: use CPU_ADDR_BITS from Kconfig during CAR by Kyösti Mälkki · 12 years ago
  88. 78efc4c remove CONFIG_SERIAL_CPU_INIT by Sven Schnelle · 12 years ago
  89. 042c146 Use broadcast SIPI to startup siblings by Sven Schnelle · 12 years ago
  90. bb31f3a Drop config variable CPU_MODEL_INDEX by Stefan Reinauer · 12 years ago
  91. c31384e Fix up Sandybridge C state generation code by Stefan Reinauer · 12 years ago
  92. 3f8989e Revamp Intel microcode update code by Stefan Reinauer · 12 years ago
  93. 05e740f Replace cache control magic numbers with symbols by Patrick Georgi · 12 years ago
  94. 5c55463 Add support for Intel Sandybridge CPU by Stefan Reinauer · 12 years ago