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review.coreboot.org / coreboot / 956283422966a7b3e8806ad63a27cf4e6a52369b / src / soc / intel
  1. bd79c5e Replace hlt() loops with halt() by Patrick Georgi · 8 years ago
  2. 24d875b ACPI: Remove CBMEM TOC from GNVS by Kyösti Mälkki · 9 years ago
  3. 609d22f intel: Remove IRQ1 from possible PIRQ assignemnt. by Vladimir Serbinenko · 8 years ago
  4. c7e6cae intel/fsp_baytrail: add new CPUID for Baytrail I step D0 by Herve ELter · 8 years ago
  5. fc1c1b5 intel/fsp_baytrail: add Gold3 FSP support by York Yang · 8 years ago
  6. c36af7b Replace includes of build.h with version.h by Kyösti Mälkki · 8 years ago
  7. b219da8 broadwell: move to per-device ACPI. by Vladimir Serbinenko · 8 years ago
  8. 91050b7 fsp_baytrail: Fix ACPI 'Object is not referenced' warnings by Martin Roth · 8 years ago
  9. e55a7c5 fsp_baytrail: Update chip.h UPD entries to match names in fspvpd.h by Martin Roth · 8 years ago
  10. 04f68c1 baytrail: fix range check by Patrick Georgi · 8 years ago
  11. 0a1699e intel: use crosscompiler readelf, instead of global by Patrick Georgi · 8 years ago
  12. 48b6b97 src: Too many terminators ';;' at end of stmts, stop Skynet by Edward O'Callaghan · 8 years ago
  13. 986e85c intel: Use 'FORCEWAKE_ACK_HSW' define over '0x130044' by Edward O'Callaghan · 8 years ago
  14. e408dce Redundant addr '&' operator on func ptr's in struct initiator by Edward O'Callaghan · 8 years ago
  15. 0625a8b {cpu,soc}: Use DEVICE_NOOP macro over dummy symbol by Edward O'Callaghan · 8 years ago
  16. dd20d5d baytrail: Remove unused devicetree fields by Shawn Nematbakhsh · 9 years ago
  17. b959079 baytrail: gfx: Don't configure hotplug + backlight registers by Shawn Nematbakhsh · 9 years ago
  18. 787809e Baytrail/dptf: Always return 0 in TCPU._PPC by Kein Yuan · 9 years ago
  19. 1131889 baytrail: handle MRC being an ELF file by Aaron Durbin · 9 years ago
  20. 31ac9e3 baytrail: Configure MSR for 2-core and 4-core P-state configutation by Duncan Laurie · 9 years ago
  21. 89f5292 baytrail: move cache-as-ram base address to 0xfe000000 by Aaron Durbin · 9 years ago
  22. 565d409 baytrail: romstage: Add function to check SW WP status for vboot by Shawn Nematbakhsh · 9 years ago
  23. d2044cc reg_script: default to n for ARCH_X86 by Isaac Christensen · 8 years ago
  24. b3f08c6 cmos: Rename the CMOS related functions. by Gabe Black · 9 years ago
  25. 1b969f6 broadwell: Update Haswell and Broadwell E0 microcode by Duncan Laurie · 9 years ago
  26. c093967 broadwell: Update microcode by Duncan Laurie · 9 years ago
  27. 6168027 broadwell: ACPI, romstage, and other updates by Duncan Laurie · 9 years ago
  28. e256295 broadwell: Update D0 microcode to FFFF000E by Duncan Laurie · 9 years ago
  29. 842bcd3 broadwell: Update microcode for supported CPUs by Duncan Laurie · 9 years ago
  30. c88c54c broadwell: add new intel SOC by Duncan Laurie · 9 years ago
  31. f0aaa29 baytrail: Move HDA verb table to Intel SOC common directory by Duncan Laurie · 9 years ago
  32. d8c4f2b baytrail: Move MRC cache code to a common directory by Duncan Laurie · 9 years ago
  33. 3511023 baytrail/rambi: S3 support and other updates by Kein Yuan · 9 years ago
  34. 1729cd8 x86 romstage: Move stack just below RAMTOP by Kyösti Mälkki · 8 years ago
  35. d05d0db haswell baytrail: Enable RELOCATABLE_RAMSTAGE by Kyösti Mälkki · 8 years ago
  36. 8ffc085 intel/fsp_baytrail: Add padding so device_nvs location matches ACPI by Scott Radcliffe · 8 years ago
  37. bf9d6a8 baytrail: Add padding to the end of device_nvs to match ACPI by Scott Radcliffe · 8 years ago
  38. 375e6ce intel/fsp_baytrail: Clear the GNVS area prior to filling by Scott Radcliffe · 8 years ago
  39. 762d53d intel/fsp_baytrail: Include header for "southcluster_smm_save_gpio_route" by Kayalvizhi Dhandapani · 8 years ago
  40. a16055a intel/fsp_baytrail: fix error "unknown type device_t", when SMM Module added by Kayalvizhi Dhandapani · 8 years ago
  41. 454625c intel/fsp_baytrail: Fix SMM/SMI by Kayalvizhi Dhandapani · 8 years ago
  42. e87ee14 baytrail: update C0 microcode by Shawn Nematbakhsh · 9 years ago
  43. ed0c838 intel/fsp_baytrail: Add S3 suspend/resume Support by Mohan D'Costa · 9 years ago
  44. cd0f228 baytrail: add 80c microcode for C0 parts by Aaron Durbin · 9 years ago
  45. 4177db5 baytrail/rambi: spi, charger, and audio updates by Aaron Durbin · 9 years ago
  46. 51d787a rambi/baytrail: ACPI, GPIO, audio, misc updates by Shawn Nematbakhsh · 9 years ago
  47. 7d7eedd soc/intel/baytrail/Kconfig: Remove empty line at top file by Paul Menzel · 9 years ago
  48. f1d6e7e Move baytrail-specific config to baytrail. by Vladimir Serbinenko · 9 years ago
  49. bfca984 soc/intel/fsp_baytrail: set up for including irqroute.h twice by Martin Roth · 9 years ago
  50. aaaef06 fsp_baytrail/.../gpio.h: Add GPIO_NC1 for GPIOS on func 1 by Martin Roth · 9 years ago
  51. 53847a2 src/.../Kconfig: various small fixes to texts by Daniele Forsi · 9 years ago
  52. a47ab1b soc,Makefile.inc: Trivial - drop trailing blank lines at EOF by Edward O'Callaghan · 9 years ago
  53. 398bb14 soc,ASL: Trivial - drop trailing blank lines at EOF by Edward O'Callaghan · 9 years ago
  54. 1110495 SPI: Split writes using spi_crop_chunk() by Kyösti Mälkki · 9 years ago
  55. 730e3b0 soc: Trivial - drop trailing blank lines at EOF by Edward O'Callaghan · 9 years ago
  56. 93d9f92 spi: Change spi_xfer to work in units of bytes instead of bits. by Gabe Black · 9 years ago
  57. 1e18735 spi: Remove unused parameters from spi_flash_probe and setup_spi_slave. by Gabe Black · 9 years ago
  58. e96f4b1 baytrail_fsp: Fix the mmconf Kconfig by Martin Roth · 9 years ago
  59. fbd1503 fsp_baytrail: Minor Kconfig updates by Martin Roth · 9 years ago
  60. c3ed886 intel boards: Use acpi_is_wakeup_s3() by Kyösti Mälkki · 9 years ago
  61. de38eea fsp_baytrail: Add the default FSP location by Martin Roth · 9 years ago
  62. c0602d4 fsp_baytrail: Add Baytrail B0/B1 "Super SKU" microcode by Martin Roth · 9 years ago
  63. a0b4a8d ACPI: Remove CBMEM TOC from GNVS by Kyösti Mälkki · 9 years ago
  64. 0baaa2d fsp_baytrail: remove version from default vbios path by Martin Roth · 9 years ago
  65. d866e58 fsp_baytrail: Fix CONFIG_ENABLE_FSP_FAST_BOOT by Martin Roth · 9 years ago
  66. ae6e0c6 cpu/intel/fsp_model_206ax: change realpath to readlink by Martin Roth · 9 years ago
  67. 433659a fsp_baytrail: Add the FSP version of Intel's Bay Trail-I chip by Martin Roth · 9 years ago
  68. 58f73a6 build: separate CPPFLAGS from CFLAGS by Patrick Georgi · 9 years ago
  69. 98f49d2 build: CPPFLAGS is more common than INCLUDES by Patrick Georgi · 9 years ago
  70. 9fd7c0f baytrail: Add SOC thermal settings by Duncan Laurie · 9 years ago
  71. c6313db baytrail: Enable PCIe common clock and ASPM by Duncan Laurie · 9 years ago
  72. 3549462 baytrail: enable graphics turbo by Aaron Durbin · 9 years ago
  73. 59d1d87 baytrail: use CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED by Aaron Durbin · 9 years ago
  74. 3f94a74 baytrail: Add ACPI Device for XHCI by Duncan Laurie · 9 years ago
  75. b013fff baytrail: nvm: use proper types for checking erase by Aaron Durbin · 9 years ago
  76. 931e590 baytrail: mrc_cache: check region erased before erasing by Aaron Durbin · 9 years ago
  77. 580b1ad baytrail: add C0 microcode update by Aaron Durbin · 9 years ago
  78. 107b71c baytrail: reboot with EC in S0 with no MRC cache and EC in RW by Aaron Durbin · 9 years ago
  79. b376ea6 baytrail: dptf: Add disable trip point methods by Duncan Laurie · 9 years ago
  80. a36d60a baytrail: Updates for DPTF ACPI framework by Duncan Laurie · 9 years ago
  81. 766482d baytrail: don't SMI on tco timer firing by Aaron Durbin · 9 years ago
  82. 19edc3a baytrail: clear the pmc wake status registers by Aaron Durbin · 9 years ago
  83. 8f31ecf baytrail: log reset, power, and wake events in elog by Aaron Durbin · 9 years ago
  84. 00bf3db baytrail: snapshot power state in romstage by Aaron Durbin · 9 years ago
  85. 1ea9bde baytrail: add cpuid for C0 by Aaron Durbin · 9 years ago
  86. 0039319 baytrail: align with intel recommendations by Aaron Durbin · 9 years ago
  87. 7f17759 baytrail: add way to load reference code from vboot area by Aaron Durbin · 9 years ago
  88. 2e65796 baytrail: Expose IOSF as ACPI object by Duncan Laurie · 9 years ago
  89. c29d6b8 baytrail: Put devices in ACPI mode after setup by Duncan Laurie · 9 years ago
  90. d82cade baytrail: Add header include wrapper and offset define by Duncan Laurie · 9 years ago
  91. 63fcb4a baytrail: cache reference code for S3 resume by Aaron Durbin · 9 years ago
  92. ce727e1 baytrail: allow ramstage_cache_location() usage in ramstage by Aaron Durbin · 9 years ago
  93. 7d34c60 baytrail: note S3 resume status earlier by Aaron Durbin · 9 years ago
  94. 616f394 baytrail: utilize reg_script_run_on_dev() by Aaron Durbin · 9 years ago
  95. cffe795 baytrail: initialize perf/power registers by Aaron Durbin · 9 years ago
  96. bc5b557 baytrail: add more iosf access functions by Aaron Durbin · 9 years ago
  97. 5cc3b40 baytrail: remove verbosity in iosf by Aaron Durbin · 9 years ago
  98. 430bf0d baytrail: Add support for LPSS and SCC devices in ACPI mode by Duncan Laurie · 9 years ago
  99. ad8d913 baytrail: Basic DPTF framework by Duncan Laurie · 9 years ago
  100. b40e444 baytrail: Enable panel and set timings by Duncan Laurie · 9 years ago