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review.coreboot.org / coreboot / 932fbd659ac7bea41e977f5fb5315fcfc93d36dd / src / northbridge / intel / sandybridge / pei_data.h
  1. 932fbd6 Add DDR refresh config to pei data structure. by Shawn Nematbakhsh · 11 years ago
  2. 1cc3416 Add support to enable/disable builtin GbE (again) by Stefan Reinauer · 11 years ago
  3. 714212a Revert "Add support to enable/disable builtin GbE" by Kyösti Mälkki · 11 years ago
  4. d358a50 Add support to enable/disable builtin GbE by Stefan Reinauer · 11 years ago
  5. e7ae96f Add Intel Panther Point USB3 initialization by Marc Jones · 12 years ago
  6. 7e8c8e9 Add PCIe init and NMode flag to PEI data structure by Stefan Reinauer · 12 years ago
  7. e8179b5 Add ddr3lv_support flag to pei_data structure by Duncan Laurie · 12 years ago
  8. 53508fe pei_data.h: Fix comment by Marc Jones · 12 years ago
  9. 48a4a7f Provide MRC with a console printing callback function by Vadim Bendebury · 12 years ago
  10. 00636b0 Add support for Intel Sandybridge CPU (northbridge part) by Stefan Reinauer · 12 years ago