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review.coreboot.org / coreboot / 8b45399adcfc425d0613a74d89ba3ec87f2be12e / src / mainboard / intel / emeraldlake2 / devicetree.cb
  1. 8b45399 mb/intel/emeraldlake2/devicetree.cb: Align contents by Angel Pons · 4 years, 8 months ago
  2. b30a47b sb/intel/{bd82x6x|ibexpeak}: Drop p_cnt_throttling_supported by Patrick Rudolph · 5 years ago
  3. 6beaef9 sb/intel/bd82x6x: Set up io_gen_dec in romstage based on devicetree by Arthur Heymans · 5 years ago
  4. 7e6946a cpu/intel/model_206ax: Remove the notion of sockets by Arthur Heymans · 6 years ago
  5. b3f2323 mb/*/*/devicetree.cb: Make sandybridge devicetree uniform by Arthur Heymans · 6 years ago
  6. dd2bc3f igd.asl rewrite by Vladimir Serbinenko · 10 years ago
  7. 33b535f sandy/ivy/nehalem: Remerge interrupt handling by Vladimir Serbinenko · 10 years ago
  8. 5b044ae bd82x6x: Move to common FADT. by Vladimir Serbinenko · 10 years ago
  9. 6d6298d ibexpeak / bd82x6x: Make SATA mode user-visible option. by Vladimir Serbinenko · 11 years ago
  10. 0aa37c4 sconfig: rename lapic_cluster -> cpu_cluster by Stefan Reinauer · 12 years ago
  11. 4aff445 sconfig: rename pci_domain -> domain by Stefan Reinauer · 12 years ago
  12. 5fe7a20 Set up the Emerald Lake 2 SMI and SCI sources based on the schematic. by Gabe Black · 12 years ago
  13. 6651da3 Add support for Intel Emerald Lake 2 CRB by Stefan Reinauer · 12 years ago