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review.coreboot.org / coreboot / 8b2c8f1c10d81299196ac8413cb51330ba3d1f12 / src / northbridge / intel / sandybridge / romstage_native.c
  1. 8b2c8f1 sandybridge/raminit: Get max mem clock from devicetree by Alexandru Gagniuc · 9 years ago
  2. bd79c5e Replace hlt() loops with halt() by Patrick Georgi · 10 years ago
  3. 33b535f sandy/ivy/nehalem: Remerge interrupt handling by Vladimir Serbinenko · 10 years ago
  4. fa1d688 sandy/ivy native: dedup romstage.c main() by Vladimir Serbinenko · 10 years ago