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review.coreboot.org / coreboot / 88607a4b1002ed6acc7f316f274feea2fd861095 / src / southbridge / intel / fsp_rangeley / romstage.c
  1. 65bb543 src: Get rid of non-local header treated as local by Elyes HAOUAS · 6 years ago
  2. 4fb64d0 fsp 1.0 systems: Check for NULL when saving HobListPtr by Martin Roth · 8 years ago
  3. 65e8f64 intel romstage: Use run_ramstage() by Kyösti Mälkki · 8 years ago
  4. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  5. 5856240 Revert "Remove FSP Rangeley SOC and mohonpeak board support" by Martin Roth · 9 years ago
  6. 959478a Remove FSP Rangeley SOC and mohonpeak board support by Alexandru Gagniuc · 9 years ago
  7. 9796f60 coreboot: move TS_END_ROMSTAGE to one spot by Aaron Durbin · 9 years ago
  8. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  9. 7868797 fsp: Move fsp to fsp1_0 by Marc Jones · 9 years ago
  10. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  11. cd02ef1 Intel FSP platforms: Fix timestamps by Kyösti Mälkki · 10 years ago
  12. 3a6550d timestamps: Switch from tsc_t to uint64_t by Stefan Reinauer · 11 years ago
  13. 71b2145 CBMEM console: Fix boards with BROKEN_CAR_MIGRATE by Kyösti Mälkki · 10 years ago
  14. 829c41d southbridge/intel: Add fsp_rangeley support by Martin Roth · 10 years ago