1. 88607a4 src: Use tabs for indentation by Elyes HAOUAS · 6 years ago
  2. 6bedbd6 soc/intel/common, mb/google, mb/siemens: Use lower case x for RXD by Furquan Shaikh · 6 years ago
  3. 84f2c63 soc/intel/common/block/hda: Enable static scanning of devices under HDA by Furquan Shaikh · 6 years ago
  4. 31bff01 soc/intel/.../hda: Add and use config for initialization of HDA codecs by Furquan Shaikh · 6 years ago
  5. 645064a soc/intel/skylake: check for NULL with if condition by Pratik Prajapati · 6 years ago
  6. 4e6b790 src: Fix MSR_PKG_CST_CONFIG_CONTROL register name by Elyes HAOUAS · 6 years ago
  7. 5fdd201 amd/stoneyridge: Comment PCI and AcpiMmio registers in ASL by Marshall Dawson · 6 years ago
  8. 33d4f73 amd/stoneyridge: Remove unused registers from ASL by Marshall Dawson · 6 years ago
  9. 0425b0a amd/stoneyridge: Remove SATA D0 on suspend by Marshall Dawson · 6 years ago
  10. 742c6fe soc/intel/cannonlake: Move the FSP related callbacks to separate files by Rizwan Qureshi · 6 years ago
  11. 5ed02e1 soc/nvidia/tegra124: Increase bootblock size by Patrick Rudolph · 6 years ago
  12. 3cb0e27 soc/intel/common: add acpi_get_sleep_type to pmclib by Bora Guvendik · 6 years ago
  13. 917b400 amd/stoneyridge: Use BIOS_DEBUG to log PM1 and PMxC0 status by Edward Hill · 6 years ago
  14. aeb7f05 amd/stoneyridge: Prepare for vboot rebooting system by Marshall Dawson · 6 years ago
  15. a8da354 src/soc/intel/cannonlake: Fix IA32_PLATFORM_DCA_CAP address by Elyes HAOUAS · 6 years ago
  16. bc94aea soc/amd/stoneyridge: Add IOMMU support by Marc Jones · 6 years ago
  17. 7d8c0c2 soc/intel/commom/block/i2c: Make I2C controller out of reset by Subrata Banik · 6 years ago
  18. cac2217 src/soc/intel/broadwell/me.c: Correct HMRFPO misspelling by Angel Pons · 6 years ago
  19. 205d5ab soc/intel/skylake: Fix spelling mistake by Subrata Banik · 6 years ago
  20. d1ccfc3 soc/intel/skylake: Replace white space with tab by Subrata Banik · 6 years ago
  21. fdb846d amd/stoneyridge: Add USB ASL for D0/D3cold by Marshall Dawson · 6 years ago
  22. cb2b70b amd/stoneyridge: Add ASL helper for AOAC PwrGood Control by Marshall Dawson · 6 years ago
  23. 9c5dc1f amd/stoneyridge: Add FCH WAK and PTS methods by Marshall Dawson · 6 years ago
  24. 14331fd amd/stoneyridge: Add ASL for D-states on AOAC devices by Marshall Dawson · 6 years ago
  25. b77c76c amd/stoneyridge: Add ACPI MMIO and PCI offsets to ASL by Marshall Dawson · 6 years ago
  26. 1d9a46b amd/stoneyridge: Load AOAC and USB gnvs values by Marshall Dawson · 6 years ago
  27. d61e347 amd/stoneyridge: Add USB settings to gnvs by Marshall Dawson · 6 years ago
  28. fc458cd amd/stoneyridge: Create gnvs entries for AOAC devices by Marshall Dawson · 6 years ago
  29. 339ae16 soc/intel/fsp_broadwell_de: Fix IA32_MC0_* names by Elyes HAOUAS · 6 years ago
  30. 7de4bb5 soc/cavium/cn81xx/spi: Add function to return SPI clock by Patrick Rudolph · 6 years ago
  31. 61452a1 amd/stoneyridge: Make gnvs ASL whitespace consistent by Marshall Dawson · 6 years ago
  32. 7717725 soc/amd/stoneyridge/BiosCallOuts: Remove #include <AmdLib.h> by Richard Spiegel · 6 years ago
  33. 174ca43 soc/intel/cannonlake: Fix ACPI FADT table generation by Duncan Laurie · 6 years ago
  34. a57447d soc/intel/cannonlake: Move SkipMpInit config to FSPM by Lijian Zhao · 6 years ago
  35. dc20a7d soc/amd/common/block/pi: Remove references to AmdLib by Richard Spiegel · 6 years ago
  36. 1d90093 soc/intel/cannonlake: Add ACPI entry for LAN by Lijian Zhao · 6 years ago
  37. b269f87 soc/intel/cannonlake: Update UPD from device switch by Lijian Zhao · 6 years ago
  38. 5b2a2d0 src/*: normalize Google copyright headers by Patrick Georgi · 6 years ago
  39. 8ac6a19 soc/sifive/fu540: Document #if ENV_ROMSTAGE line by Jonathan Neuschäfer · 6 years ago
  40. 0fb58f3 soc/sifive/fu540: Remove PLL parameters from sdram.c by Jonathan Neuschäfer · 6 years ago
  41. ce8763f mb/lowrisc: Remove the Nexys4DDR port by Jonathan Neuschäfer · 6 years ago
  42. 19b8859 soc/intel/common/block: Don't use device_t by Elyes HAOUAS · 6 years ago
  43. 8165583 amd/common/psp: Remove use of PspBaseLib by Charles Marslett · 6 years ago
  44. dd9b1d1 soc/amd/stoneyridge/romstage.c: Move STAPM code to SOC specific by Richard Spiegel · 6 years ago
  45. e072247 skylake,kabylake: Add support to set eMMC tuning param from dev tree by Pratik Prajapati · 6 years ago
  46. 951d9f6 soc/intel/denverton_ns/csme_ie_kt.c: Don't use device_t by Elyes HAOUAS · 6 years ago
  47. 83e7324 soc/intel/braswell/ramstage.c: Add SoC stepping D-1 support by Frans Hendriks · 6 years ago
  48. 756a0bd soc/intel/quark/uart.c: Don't use device_t by Elyes HAOUAS · 6 years ago
  49. 0f416d6 soc/intel/skylake: Don't use device_t by Elyes HAOUAS · 6 years ago
  50. 4658a98 soc/broadwell: Don't use device_t by Elyes HAOUAS · 6 years ago
  51. 27d3f71 soc/intel/skylake: Include some microcode blobs by Arthur Heymans · 7 years ago
  52. 338c800 soc/intel/cannonlake: Correct ITSS port id. by praveen hodagatta pranesh · 6 years ago
  53. 63da206 soc/intel/cannonlake: Remove const for spd_smbus_address by Lijian Zhao · 6 years ago
  54. 985a4fc9 soc/amd/stoneyridge/romstage.c: Remove obsolete comment by Richard Spiegel · 6 years ago
  55. 1a22d3b soc/intel/fsp_broadwell_de: Add fixed VT-d MMIO range to the resources by Werner Zeh · 6 years ago
  56. ca0c8e7 fsp_broadwell_de: Move DMAR table generation to corresponding VT-d device by Werner Zeh · 6 years ago
  57. 638bd13 amd/stoneyridge: Sync PSP base to MSR by Marshall Dawson · 6 years ago
  58. 4a13126 soc/intel/common/block: Don't use device_t in ramstage by Elyes HAOUAS · 6 years ago
  59. 27667a2 soc/cavium/cn81xx: Don't use device_t in ramstage by Elyes HAOUAS · 6 years ago
  60. de02878 cpu/*/car: fix ancient URL explaining XIP range run-time calculation by Stefan Tauner · 6 years ago
  61. c703beb mb/google/kahlee/variants/baseboard: Set STAPM percentage by Richard Spiegel · 6 years ago
  62. 66a1e8d soc/intel/broadwell: Add PCH_GPIO_PIRQ_INVERT definition by Matt DeVillier · 6 years ago
  63. 4e7a473 sifive/hifive-unleashed: enable CBMEM support by Philipp Hug · 6 years ago
  64. 7c5acd4 soc/sifive: move ram_resource to mainboard by Philipp Hug · 6 years ago
  65. 2912e8e soc/intel/denverton_ns: Enable common block PMC by Julien Viard de Galbert · 6 years ago
  66. df5e6f6 soc/sifive/fu540: Implement uart_platform_refclk for UART divisor calculation by Philipp Hug · 6 years ago
  67. 9159572 soc/sifive/fu540: Initialize SDRAM by Philipp Hug · 6 years ago
  68. 374d992 soc/sifive/fu540: Switch clock to 1GHz in romstage by Philipp Hug · 6 years ago
  69. c014ef5 soc/sifive/fu540: create ram_resource with actual memory size by Philipp Hug · 6 years ago
  70. 199b75f arch/riscv: provide a monotonic timer by Philipp Hug · 6 years ago
  71. 31dbfbc soc/sifive/fu540: add SiFive supplied header files for SDRAM initialization by Philipp Hug · 6 years ago
  72. 75a62e7 complier.h: add __always_inline and use it in code base by Aaron Durbin · 6 years ago
  73. bdd866e soc/sifive/fu540: Get SDRAM controller out of reset by Philipp Hug · 6 years ago
  74. 18764a3 soc/sifive/fu540: Update clock settings according SiFive bootloader by Philipp Hug · 6 years ago
  75. 7524400 uart/sifive: make divisor configurable by Philipp Hug · 6 years ago
  76. ef8b957 src/*/intel/: clarify Kconfig options regarding IFD by Stefan Tauner · 6 years ago
  77. 3d398ad soc/sifive/fu540: Initialize PLL and clock by Philipp Hug · 6 years ago
  78. 15192da soc/amd/stoneyridge: Fix more GPIO functions by Jonathan Neuschäfer · 6 years ago
  79. 9a32c41 amd/stoneyridge: Enable BERT table generation by Marshall Dawson · 6 years ago
  80. f0de242 amd/stoneyridge: Set BERT region size when no TSEG used by Marshall Dawson · 6 years ago
  81. 63ebb5b soc/intel/baytrail: Remove trailing space in log message by Paul Menzel · 6 years ago
  82. e056859 soc/sifive: fix compiler warning by Philipp Hug · 6 years ago
  83. 2cf9990 soc/sifive/fu540: Makefile: include mtime_init in ramstage by Philipp Hug · 6 years ago
  84. ea81928 soc/sifive/fu540: Add driver for OTP memory by Philipp Hug · 6 years ago
  85. b2e56c1 soc/intel/cannonlake: Correct number of root ports for CNL PCH H by Maulik V Vaghela · 6 years ago
  86. aa5f821 soc/sifive/fu540: add CLINT support by Xiang Wang · 6 years ago
  87. 2e38dbe riscv: update mtime initialization by Xiang Wang · 6 years ago
  88. 0370bcf complier.h: add __noreturn and use it in code base by Aaron Durbin · 6 years ago
  89. ef250c4 soc/intel/skylake: Add support for CmdTriStateDis UPD in devicetree by Shaunak Saha · 6 years ago
  90. 653f760 amd/stoneyridge: Construct ACPI BERT table by Marshall Dawson · 6 years ago
  91. 64e1fca amd/stoneyridge: Construct BERT region from machine check by Marshall Dawson · 6 years ago
  92. e1bd38b amd/stoneyridge: Create an MCA structure by Marshall Dawson · 6 years ago
  93. 0b4a1e2 amd/stoneyridge: Relocate MCA error identification by Marshall Dawson · 6 years ago
  94. 4b0f6fa amd/stoneyridge: Adjust memory map for reserved by Marshall Dawson · 6 years ago
  95. dd5411a fsp_broadwell_de: enable spi console by Okash Khawaja · 6 years ago
  96. 013ebbf soc/intel/cannonlake: Fix Coverity Scan report by Lijian Zhao · 6 years ago
  97. 79b990d mediatek: Refactor memory test code among similar SoCs by Tristan Shieh · 6 years ago
  98. 55597ff soc/intel/common: Add function to set BILD bit in RTC by Rizwan Qureshi · 6 years ago
  99. 6fbd874 chromeos/gnvs: remove function and naming cleanup by Joel Kitching · 6 years ago
  100. a5b265b riscv: separately define stack locations at different stages by Xiang Wang · 6 years ago