Gitiles
Code Review
Sign In
review.coreboot.org
/
coreboot
/
855fc1fcdbf1e40931d31f25ca7091a7b0aeace5
/
src
/
northbridge
/
intel
/
sandybridge
/
northbridge.c
9d9ce0d
nb/intel/sandybridge: Add ACPI DMAR table
by Nico Huber
· 9 years ago
bb9469c
nb/intel/sandybridge: Enable basic IOMMU support
by Nico Huber
· 9 years ago
a73b931
tree: drop last paragraph of GPL copyright header
by Patrick Georgi
· 9 years ago
3660c0f
northbridge/intel/sandybridge: Enable PEG clock-gating on demand
by Patrick Rudolph
· 9 years ago
c16e9dfa
Create i945-ivy smm tseg init based on ivy code.
by Vladimir Serbinenko
· 9 years ago
b890a12
Remove address from GPLv2 headers
by Patrick Georgi
· 9 years ago
9f74462
northbridge/intel: Use DEVICE_NOOP macro over dummy symbol
by Edward O'Callaghan
· 10 years ago
3517038
intel/sandybridge: Add PCI ID for northbridge 0x150
by Damien Zammit
· 10 years ago
0a66991
acpi: Remove explicit pointer tracking in per-device ssdt.
by Vladimir Serbinenko
· 10 years ago
35c0f43
Move nehalem/sandy/ivy to per-device acpi
by Vladimir Serbinenko
· 10 years ago
c862e44
northbridge/intel: Drop use of set_top_of_ram()
by Kyösti Mälkki
· 10 years ago
f7bfc34
intel: Remove GFXUMA and related global variables
by Kyösti Mälkki
· 11 years ago
a6130fc
intel: Drop obsolete comments on MTRR usage
by Kyösti Mälkki
· 10 years ago
4337020
Remove CACHE_ROM.
by Vladimir Serbinenko
· 11 years ago
cb08e16
CBMEM intel: Define get_top_of_ram() once per chipset
by Kyösti Mälkki
· 11 years ago
f9f74af
CBMEM x86: Unify get_cbmem_toc()
by Kyösti Mälkki
· 11 years ago
dcb688e
CBMEM: Unify get_top_of_ram()
by Kyösti Mälkki
· 11 years ago
42f4651
CBMEM northbridges: Remove references to global high_tables_base
by Kyösti Mälkki
· 11 years ago
872c922
Fix MMCONF_SUPPORT_DEFAULT for ramstage
by Kyösti Mälkki
· 11 years ago
eac00d2
intel/sandybridge: Locate CBMEM TOC early in ramstage
by Kyösti Mälkki
· 11 years ago
243aa44
boot: remove cbmem_post_handling()
by Aaron Durbin
· 11 years ago
c6f2722
sandybridge: enable ROM caching
by Aaron Durbin
· 11 years ago
c965076
resources: introduce reserved_ram_resource()
by Aaron Durbin
· 11 years ago
a46a712
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
by Paul Menzel
· 11 years ago
fd611f9
Drop CONFIG_WRITE_HIGH_TABLES
by Stefan Reinauer
· 11 years ago
0aa37c4
sconfig: rename lapic_cluster -> cpu_cluster
by Stefan Reinauer
· 12 years ago
4aff445
sconfig: rename pci_domain -> domain
by Stefan Reinauer
· 12 years ago
5079a0d
Remove assembly coded log2 function
by Ronald G. Minnich
· 12 years ago
cf8e466
Cleanup coreboot memory table includes
by Kyösti Mälkki
· 12 years ago
9ca1c0a
Sandy/Ivy Bridge and Cougar/Panther Point: Fix names
by Stefan Reinauer
· 12 years ago
5e29f00
Intel and GFXUMA: drop redundant use of lb_add_memory_range()
by Kyösti Mälkki
· 12 years ago
7f189cc
Intel Sandybridge and UMA: use mmio_resource()
by Kyösti Mälkki
· 12 years ago
1ec5e74
Intel Sandybridge: add reserved memory as resources
by Kyösti Mälkki
· 12 years ago
fe7b5d2
Ivybridge: fix workaround and enable PAIR
by Duncan Laurie
· 12 years ago
77dbbac
CPU: Add basic support for Nominal Configurable TDP
by Duncan Laurie
· 12 years ago
496f4a0
SandyBridge: Add another PCI device ID for northbridge
by Walter Murphy
· 12 years ago
cc55b9b
Define global uma_memory variables
by Kyösti Mälkki
· 12 years ago
bb11e60
Hook up MRC cache update
by Stefan Reinauer
· 12 years ago
1244f4b
Rework Sandybridge MRC cache handling
by Stefan Reinauer
· 12 years ago
e166782
Clean up #ifs
by Patrick Georgi
· 12 years ago
0ff99b7
Modify DMI init for IvyBridge
by Vincent Palatin
· 12 years ago
00636b0
Add support for Intel Sandybridge CPU (northbridge part)
by Stefan Reinauer
· 12 years ago