Gitiles
Code Review Sign In
review.coreboot.org / coreboot / 80c79a5dc31cca9f157cd2f35f435dfa7648ce11 / src / soc / amd / stoneyridge
  1. 9460a98 soc/amd/stoneyridge/northbridge.c: remove unnecessary null check by Martin Kepplinger · 7 years ago
  2. 68243a5 soc/amd/common: Add initial support for AMD PSP by Marshall Dawson · 7 years ago
  3. 786bd5d soc/amd/stoneyridge: Convert monotonic timer by Marshall Dawson · 7 years ago
  4. 12983db soc/amd/stoneyridge: Revise pci_devs.h file by Marshall Dawson · 7 years ago
  5. 9d6b8b4 soc/amd/stoneyridge: Fix device IDs by Marshall Dawson · 7 years ago
  6. 94ee937 soc/amd/stoneyridge: Enable early cbmem by Marshall Dawson · 7 years ago
  7. c6ef9db soc/amd/stoneyridge: Add tseg size to Kconfig by Marshall Dawson · 7 years ago
  8. 7edba2e soc/stoneyridge: Remove IDE controller by Marshall Dawson · 7 years ago
  9. 6a9f846 soc/stoneyridge: Remove FCH PCIe support by Marshall Dawson · 7 years ago
  10. 8a906df soc/amd/stoneyridge: Remove PCIe-PCI bridge by Marshall Dawson · 7 years ago
  11. 4e101ad soc/amd/stoneyridge: Fix most checkpatch errors by Marshall Dawson · 7 years ago
  12. 6744dfe soc/amd/stoneyridge/acpi: Fix checkpatch errors by Marshall Dawson · 7 years ago
  13. 8d29dd1 vendorcode/amd: Unify Porting.h across all targets by Stefan Reinauer · 7 years ago
  14. 1587dc8 soc/amd/stoneyridge: Add northbridge support by Marc Jones · 7 years ago
  15. 21cde8b soc/amd/stoneyridge: Add CPU files by Marc Jones · 7 years ago
  16. 2448484 soc: Add AMD Stoney Ridge southbridge code by Marc Jones · 7 years ago