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review.coreboot.org / coreboot / 7c49cb8f9ca86e791c392da40e7f0d3cb7ed47f3 / src / northbridge / intel / sandybridge / raminit_native.h
  1. 7c49cb8 nb/intel/sandybridge: Tidy up code and comments by Angel Pons · 4 years, 5 months ago
  2. f3f36fa src (minus soc and mainboard): Remove copyright notices by Patrick Georgi · 4 years, 5 months ago
  3. e258b9a intel sandy/ivy: Improve DIMM replacement detection by Kyösti Mälkki · 8 years ago
  4. 4cb44e5 intel sandy/ivy: Move SPD loading after TS_BEFORE_INITRAM by Kyösti Mälkki · 8 years ago
  5. ffbb3c0 Merge sandy/ivybridge romstage flow for MRC and non-MRC. by Vladimir Serbinenko · 9 years ago
  6. 609bd94 ivy: Add a possiblity for mainboard early init. by Vladimir Serbinenko · 9 years ago
  7. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  8. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  9. fa1d688 sandy/ivy native: dedup romstage.c main() by Vladimir Serbinenko · 10 years ago
  10. 7686a56 sandy/ivybridge: Native raminit. by Vladimir Serbinenko · 10 years ago