- 799c321 cbmem_top_chipset: Change the return value to uintptr_t by Elyes Haouas · 1 year, 8 months ago
- 030d338 nb/intel: Add missing <types.h> by Elyes HAOUAS · 3 years, 5 months ago
- 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 2 months ago
- 4b42983 src/northbridge: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 3 months ago
- f3f36fa src (minus soc and mainboard): Remove copyright notices by Patrick Georgi · 4 years, 4 months ago
- ef90609 src: capitalize 'RAM' by Elyes HAOUAS · 4 years, 5 months ago
- 340e4b8 lib/cbmem_top: Add a common cbmem_top implementation by Arthur Heymans · 4 years, 9 months ago
- d53fd70 intel/smm/gen1: Use smm_subregion() by Kyösti Mälkki · 5 years ago
- cd7a70f soc/intel: Use common romstage code by Kyösti Mälkki · 5 years ago
- a963acd arch/x86: Add <arch/romstage.h> by Kyösti Mälkki · 5 years ago
- f091f4d intel/smm/gen1: Rename header file by Kyösti Mälkki · 5 years ago
- 544878b arch/x86: Add postcar_frame_common_mtrrs() by Kyösti Mälkki · 5 years ago
- 5bc641a cpu/intel: Refactor platform_enter_postcar() by Kyösti Mälkki · 5 years ago
- fe481eb northbridge/intel: Rename ram_calc.c to memmap.c by Kyösti Mälkki · 5 years ago[Renamed from src/northbridge/intel/gm45/ram_calc.c]
- bccd2b6 intel/i945,gm45,pineview,x4x: Fix stage cache location by Kyösti Mälkki · 5 years ago
- aba8fb1 intel/i945,gm45,pineview,x4x: Move stage cache support function by Kyösti Mälkki · 5 years ago
- 6e2d0c1 arch/x86: Adjust size of postcar stack by Kyösti Mälkki · 5 years ago
- f74f6cb nb/intel/{gm45,i945,x4x}: Correct array bounds checks by Jacob Garber · 5 years ago
- 065857e arch/io.h: Drop unnecessary include by Kyösti Mälkki · 5 years ago
- f1b58b7 device/pci: Fix PCI accessor headers by Kyösti Mälkki · 5 years ago
- 009518e nb/intel/gm45: Correctly cache TSEG by Arthur Heymans · 6 years ago
- 64f6b71 src/northbridge: Fix typo by Elyes HAOUAS · 6 years ago
- aade90e nb/intel/gm45: Use common code for SMM in TSEG by Arthur Heymans · 6 years ago
- 3a4edb6 nb/intel/gm45: Switch to POSTCAR_STAGE by Arthur Heymans · 6 years ago
- 089b908 nb/intel: Use postcar_frame_add_romcache() by Nico Huber · 6 years ago
- 654cc2f {cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate by Nico Huber · 6 years ago
- 8b76605 nb/intel/gm45: Allocate a 8M TSEG region by Arthur Heymans · 6 years ago
- 823020d intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setup by Kyösti Mälkki · 8 years ago
- 811932a intel i945 gm45 x4x: Apply cbmem_top() alignment by Kyösti Mälkki · 8 years ago
- eeaf9e4 nb/gm45: Refactor IGD vram decoding by Arthur Heymans · 8 years ago
- a4ffe9d intel post-car: Separate files for setup_stack_and_mtrrs() by Kyösti Mälkki · 8 years ago
- a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
- b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
- f1e3c76 CBMEM: Do not use get_top_of_ram() with DYNAMIC_CBMEM by Kyösti Mälkki · 10 years ago
- efd1c6b gm45: Recognize 48MiB gfx UMA. by Vladimir Serbinenko · 10 years ago
- dcb688e CBMEM: Unify get_top_of_ram() by Kyösti Mälkki · 11 years ago
- 3f9a62e Add pci_devfn_t and use with __SIMPLE_DEVICE__ by Kyösti Mälkki · 11 years ago
- ef84401 Add directive __SIMPLE_DEVICE__ by Kyösti Mälkki · 11 years ago
- 24d1d4b x86: Unify arch/io.h and arch/romcc_io.h by Stefan Reinauer · 11 years ago
- 2efc880 intel/gm45: new northbridge by Patrick Georgi · 12 years ago