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review.coreboot.org / coreboot / 78c622443e17a0b6d72142a9a8ed68069f22b745 / src / superio / fintek / f81865f
  1. f21bdc3 superio/*/superio.c: Don't hide pointer types behind typedefs by Edward O'Callaghan · 8 years ago
  2. f6f1ad6 superio/*: Remove redundant chip.h header by Edward O'Callaghan · 9 years ago
  3. def00be src/drivers/pc80: Remove empty struct keyboard by Edward O'Callaghan · 9 years ago
  4. cf7b498 superio/fintek/*: Factor out generic romstage component by Edward O'Callaghan · 9 years ago
  5. 6d51f6b superio/fintek/*: Fix header style by Edward O'Callaghan · 9 years ago
  6. d304331 superio/fintek/f81865f: Avoid .c includes by Edward O'Callaghan · 9 years ago
  7. e2f4c2a uart8250: Drop includes in superio by Kyösti Mälkki · 9 years ago
  8. 1c81128 pnp: Add some default functions to enter/exit config state by Nico Huber · 10 years ago
  9. 0b2ee93 pnp: Remove now plain wrappers for default PnP functions by Nico Huber · 10 years ago
  10. 13dc976 pnp: Register implementations of enter/exit config state by Nico Huber · 10 years ago
  11. f898f7b pnp: Provide alternative pnp_enable() implementation by Nico Huber · 10 years ago
  12. 24d1d4b x86: Unify arch/io.h and arch/romcc_io.h by Stefan Reinauer · 10 years ago
  13. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 10 years ago
  14. fee73df Auto-declare chip_operations by Kyösti Mälkki · 11 years ago
  15. 5ff7c13 remove trailing whitespace by Stefan Reinauer · 11 years ago
  16. 13508b9 Drop baud rate init to an arbitrary baud rate from Super I/O code. by Stefan Reinauer · 12 years ago
  17. d0a8ebf This code provides support for the superio chip on the IBASE Technology DB-FT1 (AMD code name Persimmon) platform. It is independent of the AMD code. by Frank Vibrans · 12 years ago