1. 72a9beb samsung/exynos*/Makefile.inc: Simplify unnecessary ifeq by Edward O'Callaghan · 8 years ago
  2. 4dc3e28 tegra124: Add a utility function to read the cause of the most recent reset. by Gabe Black · 9 years ago
  3. bb932c5 nyan*: I2C: Implement bus clear when 'ARB_LOST' error occurs by Tom Warren · 9 years ago
  4. fa95a6f soc/samsung/exynos5250/clk.h: Trivial, fix spelling in comments by Edward O'Callaghan · 8 years ago
  5. 9b152b2 soc/samsung/exynos5250/clock.c: Trivial whitespace fixes by Edward O'Callaghan · 8 years ago
  6. f679cfe soc/samsung/exynos: Sync 'power.c' between chip variants by Edward O'Callaghan · 8 years ago
  7. 5b63dc1 soc/samsung/exynos: Make 'ps_hold_setup()' static by Edward O'Callaghan · 8 years ago
  8. 75f70179 nyan*: Add fast link training functions by Jimmy Zhang · 9 years ago
  9. 270e300 fsp_baytrail: Initialize LPC pads in bootblock for port 80 by Martin Roth · 8 years ago
  10. c9be93f fsp_baytrail: Remove GPIO_NC1 #define by Martin Roth · 8 years ago
  11. 002178a baytrail SOCs: Add missing comma in gpio.h by Martin Roth · 8 years ago
  12. 59e209a baytrail: initialize backlight PWM frequency by Aaron Durbin · 9 years ago
  13. f2612a1 x86: Initialize SPI controller explicitly during PCH init by David Hendricks · 9 years ago
  14. 5a056d3 tegra124: modify panel init sequence by Ken Chang · 9 years ago
  15. 41359bd nyan*: enable CLAMP_INPUTS by Ken Chang · 9 years ago
  16. 52669ef fsp_baytrail: Add code to read GPIOs in romstage by Martin Roth · 8 years ago
  17. f574a32 ARM: Use LPAE for Virtual Address Translation by Daisuke Nojiri · 9 years ago
  18. cbae0de tegra124: change PLLD VCO calculation algorithm by Ken Chang · 9 years ago
  19. 0cbba82 tegra124: Allow "best" PLLD parameters for unmatched pixel clock. by Hung-Te Lin · 9 years ago
  20. 066b164 tegra124: Always enable DC when attaching SOR. by Hung-Te Lin · 9 years ago
  21. 47e3cf8 nyan*: debug: Add sor registers dump function by Jimmy Zhang · 9 years ago
  22. e57c303 tegra124: clock: Enforce PLL constraints for VCO and CF by Julius Werner · 9 years ago
  23. d712ec4 nyan*: Set SOR_NV_PDISP_SOR_DP_SPARE0 register by Jimmy Zhang · 9 years ago
  24. 84b8be6 nyan*: merge a couple of sor setting difference from kernel driver by Jimmy Zhang · 9 years ago
  25. f682ad0 nyan*: Apply sor fix from kernel dc driver by Jimmy Zhang · 9 years ago
  26. 3af0d31 tegra124: Initialize display panel by EDID. by Hung-Te Lin · 9 years ago
  27. 71b2145 CBMEM console: Fix boards with BROKEN_CAR_MIGRATE by Kyösti Mälkki · 8 years ago
  28. 13a845a Intel FSP: Move to DYNAMIC_CBMEM by Kyösti Mälkki · 8 years ago
  29. cdb61a6 i2c: Replace the i2c API. by Gabe Black · 9 years ago
  30. 2d43a48 tegra124: set MOT bit for I2C-over-AUX by Ken Chang · 9 years ago
  31. 1a8e0af tegra124: Setup clock PLLD by approximating display panel pixel clock. by Hung-Te Lin · 9 years ago
  32. 0c9cc5e tegra124: Release DMA channel at end of transaction by David Hendricks · 9 years ago
  33. 04465637 tegra124: Use correct mask for APB bus width by David Hendricks · 9 years ago
  34. 46e0975 nyan: Enable the cbmem console on nyan and allocate space for it in SRAM. by Gabe Black · 9 years ago
  35. 9d32739 tegra124: More improvements to the clock initialization macros. by Gabe Black · 9 years ago
  36. f296c94 tegra: spi: Read the command1 register to ensure the write to it completes. by Gabe Black · 9 years ago
  37. e5b2127 tegra124: A couple clock fixes. by Gabe Black · 9 years ago
  38. c04d3dd tegra124: Add tegra_dc_i2c_aux_read to allow reading EDID. by Hung-Te Lin · 9 years ago
  39. 042f849 tegra124: Skip display init when vboot says we don't need it. by Gabe Black · 9 years ago
  40. ec9293f spi: Eliminate the spi_cs_activate and spi_cs_deactivate functions. by Gabe Black · 9 years ago
  41. 87f3b4e spi: Remove the spi_set_speed and spi_cs_is_valid functions. by Gabe Black · 9 years ago
  42. 967058f spi: Factor EC protocol details out of the SPI drivers. by Gabe Black · 9 years ago
  43. aca2150 UCB RISCV: Switch to DYNAMIC_CBMEM by Kyösti Mälkki · 8 years ago
  44. a0a71b0 fsp platfoms: add prototype & consolidate main entry-point by Martin Roth · 8 years ago
  45. 99a3bba intel/baytrail: Spelling fixes by Martin Roth · 8 years ago
  46. 7c96629 intel/fsp_baytrail: Spelling fixes by Martin Roth · 8 years ago
  47. 1fc2ba5 samsung/exynos5420: Spelling Fixes by Martin Roth · 8 years ago
  48. de7ed6f intel/broadwell: Spelling fixes by Martin Roth · 8 years ago
  49. 0a0d048 soc/qualcomm/ipq806x/Kconfig: Fix indent style by Edward O'Callaghan · 8 years ago
  50. 59bff09 fsp_baytrail: Update function disable code by Martin Roth · 8 years ago
  51. bc78fcf fsp_baytrail: Kconfig update for Gold 3 FSP by Martin Roth · 8 years ago
  52. bb27316 fsp_baytrail: Update microcode for Gold 3 FSP release by Martin Roth · 8 years ago
  53. e10108a FSP platform microcode: Update to remove Kconfig variable by Martin Roth · 8 years ago
  54. db3e2f0 ipq8064: Make clock code build in coreboot by Vadim Bendebury · 9 years ago
  55. 63956e6 ipq8064: prepare UART driver for use in coreboot by Vadim Bendebury · 9 years ago
  56. 30eda3e fsp_baytrail: remove register option for TSEG size by Martin Roth · 8 years ago
  57. bdfe98f fsp_baytrail: update printk to use FSP_INFO_LEVEL by Martin Roth · 8 years ago
  58. 12d86e7 fsp_baytrail: update for UPD_DEVICE_CHECK macro by Martin Roth · 8 years ago
  59. 5c8e7a4 fsp_baytrail: update to add the UPD_MEMDOWN_CHECK macro by Martin Roth · 8 years ago
  60. 8d936ce fsp_baytrail: update for UPD_SPD_CHECK macro by Martin Roth · 8 years ago
  61. e8d1901 fsp_baytrail: update to add the UPD_DEFAULT_CHECK macro by Martin Roth · 8 years ago
  62. 546953c Replace hlt with halt() by Patrick Georgi · 8 years ago
  63. e0e784a Add UCB RISCV support for architecture, soc, and emulation mainboard.. by Ronald G. Minnich · 8 years ago
  64. 796fe06 Mark non-executable files non-executable by Patrick Georgi · 8 years ago
  65. bd79c5e Replace hlt() loops with halt() by Patrick Georgi · 8 years ago
  66. 24d875b ACPI: Remove CBMEM TOC from GNVS by Kyösti Mälkki · 8 years ago
  67. 609d22f intel: Remove IRQ1 from possible PIRQ assignemnt. by Vladimir Serbinenko · 8 years ago
  68. c7e6cae intel/fsp_baytrail: add new CPUID for Baytrail I step D0 by Herve ELter · 8 years ago
  69. fc1c1b5 intel/fsp_baytrail: add Gold3 FSP support by York Yang · 8 years ago
  70. c36af7b Replace includes of build.h with version.h by Kyösti Mälkki · 8 years ago
  71. b219da8 broadwell: move to per-device ACPI. by Vladimir Serbinenko · 8 years ago
  72. 91050b7 fsp_baytrail: Fix ACPI 'Object is not referenced' warnings by Martin Roth · 8 years ago
  73. e55a7c5 fsp_baytrail: Update chip.h UPD entries to match names in fspvpd.h by Martin Roth · 8 years ago
  74. 2dc0132 tegra124: remove spurious error message by Patrick Georgi · 8 years ago
  75. 68e4cbd tegra124: actually parse is_lvds by Patrick Georgi · 8 years ago
  76. 04f68c1 baytrail: fix range check by Patrick Georgi · 8 years ago
  77. b9597b0 tegra124: allow tegra124 devices to run vboot rmodule by Aaron Durbin · 9 years ago
  78. 6541b28 tegra124: i2c: Reset the controller when there's an error. by Gabe Black · 9 years ago
  79. 8253bd9 tegra124: fix the dangerous VPR write order by Joseph Lo · 9 years ago
  80. bab7896 tegra124: Add some functions for resetting peripherals. by Gabe Black · 9 years ago
  81. bd5925a t124: Clean up display init functions by Jimmy Zhang · 9 years ago
  82. 0a1699e intel: use crosscompiler readelf, instead of global by Patrick Georgi · 8 years ago
  83. 7c6e489 arm: Put assembly functions into separate sections by Julius Werner · 9 years ago
  84. f4b209f ipq8064: Make timer code compile by Vadim Bendebury · 9 years ago
  85. 028d816 ipq8064: Configure proper bootblock stack and load address by Vadim Bendebury · 9 years ago
  86. e83c80c Use sbl blobs from a private location by Vadim Bendebury · 9 years ago
  87. 9d91aba ipq806x: Add support for GPIO operations by Furquan Shaikh · 9 years ago
  88. 51f6fb2 tegra124: Add a macro specifically for configuring the I2C controller clocks. by Gabe Black · 9 years ago
  89. f6280bc tegra124: Fix some bugs in the clock configuration macros. by Gabe Black · 9 years ago
  90. df761ea t124: Skip PLLP init to 408MHz by Jimmy Zhang · 9 years ago
  91. c225e4c t124: nyan: Enable lock bit on pll by Jimmy Zhang · 9 years ago
  92. 479cfeb tegra124: fix OSC initialization on LP0 resume by Andrew Bresticker · 9 years ago
  93. 25bf775 tegra124: fix PLLU parameters by Andrew Bresticker · 9 years ago
  94. 3178503 tegra124: Make the PLLX frequency selectable by model. by Gabe Black · 9 years ago
  95. 0a5834b ipq806x: Typecast address to void * in read/write operations by Furquan Shaikh · 9 years ago
  96. 75b4beb ipq806x: Add an include/ folder to ipq806x by Furquan Shaikh · 9 years ago
  97. 476f731 Copy u-boot sources as is and modify the tree to still build by Vadim Bendebury · 9 years ago
  98. 9cb70ae Include IPQ8064 SBLs code in the coreboot bootblock by Vadim Bendebury · 9 years ago
  99. bf04eda tegra124: enable JTAG in Security Mode by Jimmy Zhang · 9 years ago
  100. 7f0cb15 tegra124: Program PWM1 to drive panel backlight by Andrew Chew · 9 years ago