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review.coreboot.org / coreboot / 77133afe3142096cc7ea7755bfc727f59f2282f9 / src / southbridge / amd / cs5536 / cs5536.c
  1. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  2. 580e722 devicetree: Change scan_bus() prototype in device ops by Kyösti Mälkki · 9 years ago
  3. d0e212c devicetree: Discriminate device ops scan_bus() by Kyösti Mälkki · 9 years ago
  4. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  5. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  6. 55e31a9 southbridge/amd amd81XX, cs553X & sr5650 spelling fixes by Martin Roth · 10 years ago
  7. b3f08c6 cmos: Rename the CMOS related functions. by Gabe Black · 10 years ago
  8. 01c095f AMD Geode CS5536: downgrade BIOS_ERR by Christian Gmeiner · 11 years ago
  9. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  10. a8ae1c6 Whitespace: Replace tab character in license text with two spaces by Paul Menzel · 12 years ago
  11. b5dfcae cs5536: add smbus support in ramstage by Christian Gmeiner · 12 years ago
  12. 5005bb06 Unify use of post_code by Alexandru Gagniuc · 13 years ago
  13. 74d1a6e We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it. by Uwe Hermann · 14 years ago
  14. 7eac445 Always enable parent resources before child resources. by Myles Watson · 14 years ago
  15. 81af48e This patch extends the reserved resources for the cs5536 to avoid the excluded by Myles Watson · 14 years ago
  16. 2305f74 Move CS5535 specific setup from GX2 driver to CS5535. by Stefan Reinauer · 14 years ago
  17. ae3f4b5 Fix bug from r5476 re CS5536 device search during GeodeLX PCI domain enable by Peter Stuge · 14 years ago
  18. 14e2277 Since some people disapprove of white space cleanups mixed in regular commits by Stefan Reinauer · 14 years ago
  19. 4292685 None of the cs5536 settings in devicetree.cb were ever used and nobody noticed. by Stefan Reinauer · 14 years ago
  20. ba09695 fix compilation remaining geode boards by Stefan Reinauer · 14 years ago
  21. 720297c remove some more warnings by Stefan Reinauer · 14 years ago
  22. c02b4fc printk_foo -> printk(BIOS_FOO, ...) by Stefan Reinauer · 14 years ago
  23. 78b4033 more warnings gone... by Stefan Reinauer · 14 years ago
  24. e30db0e Port of CS5536 early UART setup from v3. Permit early setup of COM2 by Edwin Beasant · 15 years ago
  25. 5a559d4 The UART2 on the AMD cs5536 is incorrectly configured in two places. by Stefan Reinauer · 15 years ago
  26. 9fe4d79 coreboot used to have two different "APIs" for memory accesses: by Stefan Reinauer · 15 years ago
  27. 29cc9ed Move the v3 resource allocator to v2. by Myles Watson · 15 years ago
  28. ae762b5 use include file for i8259 where appropriate (trivial) by Stefan Reinauer · 15 years ago
  29. 552b327 This patch converts __FUNCTION__ to __func__, since __func__ is standard. by Myles Watson · 16 years ago
  30. 2ee6779 The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots of by Carl-Daniel Hailfinger · 16 years ago
  31. 2c39c4c There was a programming error which made most USB port4 setup wrong. This patch uses byte pointer and the MMIO read and write functions. by Marc Jones · 16 years ago
  32. f8ee180 Rename almost all occurences of LinuxBIOS to coreboot. by Stefan Reinauer · 17 years ago
  33. 7e61e45 Please bear with me - another rename checkin. This qualifies as trivial, no by Stefan Reinauer · 17 years ago
  34. f1cf1f7 Ever wondered where those "setting incorrect section attributes for by Stefan Reinauer · 17 years ago
  35. c72ff11 The GPIOs used for UART2 RX and TX were reversed. by Marc Jones · 17 years ago
  36. f027280 The UART disable code was causing a hang and was worked around with a by Marc Jones · 17 years ago
  37. 344e457 Add missing license headers, minor cosmetic fixes in existing headers. by Uwe Hermann · 17 years ago
  38. d03b7d4 This fix properly hides the UDC and OTG PCI headers when the cs5536 is by Marc Jones · 17 years ago
  39. ddf845f This patch cleans up and clarifies Geode source code comments. by Marc Jones · 17 years ago
  40. 2a133f7 Fix the indent and whitespace to match LinuxBIOS standards by Jordan Crouse · 17 years ago
  41. 5ef8b0f by Ronald G. Minnich · 17 years ago
  42. a67d4fd This patch re-implements support for the CS5536 companion chip for the by Marc Jones · 17 years ago
  43. a7aa29b Use the canonical name of the vendors/devices and the by Uwe Hermann · 18 years ago
  44. bcd1f23 - Much better USB P4 fix. by Richard Smith · 18 years ago
  45. fa60e7f - USB P4 as host fix by Richard Smith · 18 years ago
  46. 64443b8 - fix a silly pointer dereference thinko in my previous commit by Richard Smith · 18 years ago
  47. 59ba228 - Added suport for enabling USB P4 on the olpc by Richard Smith · 18 years ago
  48. 4788eff restore the old code for enabling flash. The new amd code did not work. by Ronald G. Minnich · 18 years ago
  49. da7ee9f These changes incorporate steve goodrich'es fixes, and one bug that is by Ronald G. Minnich · 18 years ago
  50. aad235e changes per steve goodrich. by Ronald G. Minnich · 18 years ago
  51. 88fb1a6 set up interrupt values for the southbridge, and add a function to by Ronald G. Minnich · 18 years ago
  52. 2d7bb59 fix idiiot typo I did not catch. by Ronald G. Minnich · 18 years ago
  53. 5d573c2 Commit for IDE NAND FLASH by Ronald G. Minnich · 18 years ago
  54. d3ba4aa Fall back to pre-broken settings and setup for GX2. by Ronald G. Minnich · 18 years ago
  55. 3716427 we don't need msr_init by Ronald G. Minnich · 18 years ago
  56. cf120d1 builds and should do the right things for sb for interrupt routing. by Ronald G. Minnich · 18 years ago
  57. 1c2f49e to give ollie a look. by Ronald G. Minnich · 18 years ago
  58. 5d69896 add cs5536 by Li-Ta Lo · 18 years ago