1. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  2. 439356f x86: remove cpu_incs as romstage Make variable by Aaron Durbin · 9 years ago
  3. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  4. 773485b intel CAR: Fix DCACHE_RAM_BASE for old sockets by Kyösti Mälkki · 10 years ago
  5. dc112e3 cpu,Makefile.inc: Trivial - drop trailing blank lines at EOF by Edward O'Callaghan · 10 years ago
  6. f7c55148 cpu: Trivial - drop trailing blank lines at EOF by Edward O'Callaghan · 10 years ago
  7. c06af9e Drop redundant select CACHE_AS_RAM by Kyösti Mälkki · 10 years ago
  8. 2c38f50 cpu/intel: Make all Intel CPUs load microcode from CBFS by Alexandru Gagniuc · 11 years ago
  9. 4c3ab73 cpu: Fix spelling by Martin Roth · 11 years ago
  10. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  11. 0279036 Remove chip.h files without config structure by Kyösti Mälkki · 12 years ago
  12. fee73df Auto-declare chip_operations by Kyösti Mälkki · 12 years ago
  13. 1ac19e2 cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs. by Keith Hui · 13 years ago
  14. b14fb6a Move support for Deschutes Slot 1 CPUs (model_65x) into its own directory. by Keith Hui · 14 years ago
  15. af8b2b9 Drop unused DCACHE_RAM_BASE from intel/car/cache_as_ram.inc-using sockets. by Uwe Hermann · 14 years ago
  16. 6529c2a Move out Katmai Slot 1 CPUs (model_67x) from model_6xx to model_67x. by Keith Hui · 14 years ago
  17. 5e9c1cd Add missing include of model_6bx for slot_1. by Keith Hui · 14 years ago
  18. 6f2d20e Convert all Intel 440BX boards to Cache-as-RAM (CAR). by Uwe Hermann · 14 years ago
  19. 8463dd9 Rename build system variables to be more intuitive, and by Patrick Georgi · 14 years ago
  20. dd6ad34 license header fixes by Nils Jacobs · 14 years ago
  21. e1ec158 Add proper Slot 1 CPU support code/infrastructure. by Keith Hui · 14 years ago