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review.coreboot.org / coreboot / 77133afe3142096cc7ea7755bfc727f59f2282f9 / src / cpu / intel / model_67x
  1. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  2. 1d85700 cpu: microcode: Use microcode stored in binary format by Alexandru Gagniuc · 9 years ago
  3. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  4. 26e24cc 3rdparty: move to 3rdparty/blobs by Patrick Georgi · 9 years ago
  5. f4f0287 3rdparty: Move to blobs by Patrick Georgi · 9 years ago
  6. 5818da2 cpu/intel: (non-FSP) Remove microcode updates from tree by Alexandru Gagniuc · 11 years ago
  7. ee89435 cpu/intel (non-FSP): Use microcode from blobs repository by Alexandru Gagniuc · 11 years ago
  8. 77b1655 vboot2: add verstage by Stefan Reinauer · 10 years ago
  9. 2c9d2cf {arch,cpu,drivers,ec}: Don't hide pointers behind typedefs by Edward O'Callaghan · 10 years ago
  10. 99ac98f Introduce stage-specific architecture for coreboot by Furquan Shaikh · 10 years ago
  11. fd33781 Move ARCH_* from board/Kconfig to cpu or soc Kconfig. by Furquan Shaikh · 10 years ago
  12. 07d881a0 cpu/intel: Remove dummy terminators from microcode blobs by Alexandru Gagniuc · 11 years ago
  13. 2c38f50 cpu/intel: Make all Intel CPUs load microcode from CBFS by Alexandru Gagniuc · 11 years ago
  14. 8eaf1e7 cpu/intel/model_67x: Add missing include by Kyösti Mälkki · 11 years ago
  15. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  16. 23f38cd Get rid of drivers class by Patrick Georgi · 12 years ago
  17. adfbcb79 MTRR: get physical address size from CPUID by Sven Schnelle · 13 years ago
  18. 1ac19e2 cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs. by Keith Hui · 13 years ago
  19. 6529c2a Move out Katmai Slot 1 CPUs (model_67x) from model_6xx to model_67x. by Keith Hui · 14 years ago