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coreboot
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77133afe3142096cc7ea7755bfc727f59f2282f9
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src
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cpu
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intel
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model_206ax
a73b931
tree: drop last paragraph of GPL copyright header
by Patrick Georgi
· 9 years ago
0ace013
sandybridge: Disable parallel CPU initialization
by Nico Huber
· 9 years ago
86091f9
cpu/mtrr.h: Fix macro names for MTRR registers
by Alexandru Gagniuc
· 9 years ago
1d85700
cpu: microcode: Use microcode stored in binary format
by Alexandru Gagniuc
· 9 years ago
439356f
x86: remove cpu_incs as romstage Make variable
by Aaron Durbin
· 9 years ago
df20506
Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in Kconfig
by Martin Roth
· 9 years ago
4a45ec4
x86: Drop -Wa,--divide
by Stefan Reinauer
· 9 years ago
efc01f0
model_206ax: Fix APIC map when HT is disabled.
by Vladimir Serbinenko
· 9 years ago
c16e9dfa
Create i945-ivy smm tseg init based on ivy code.
by Vladimir Serbinenko
· 9 years ago
5264862
Remove empty lines at end of file
by Elyes HAOUAS
· 9 years ago
5eea458
device_ops: add device_t argument to acpi_fill_ssdt_generator
by Alexander Couzens
· 9 years ago
09b20cd
Remove address from GPLv2 headers
by Patrick Georgi
· 9 years ago
44cbe10
smm: Merge configs SMM_MODULES and SMM_TSEG
by Vladimir Serbinenko
· 9 years ago
a3e41c0
Migrate 206ax to SMM_MODULES
by Vladimir Serbinenko
· 9 years ago
5477dca
intel: Remove pstate_coord_type.
by Vladimir Serbinenko
· 9 years ago
9bb5c5c
acpigen: Remove all explicit length tracking
by Vladimir Serbinenko
· 10 years ago
b890a12
Remove address from GPLv2 headers
by Patrick Georgi
· 9 years ago
e7366da
Include back the 306ax microcode again.
by Vladimir Serbinenko
· 9 years ago
26e24cc
3rdparty: move to 3rdparty/blobs
by Patrick Georgi
· 9 years ago
f4f0287
3rdparty: Move to blobs
by Patrick Georgi
· 9 years ago
5818da2
cpu/intel: (non-FSP) Remove microcode updates from tree
by Alexandru Gagniuc
· 11 years ago
ee89435
cpu/intel (non-FSP): Use microcode from blobs repository
by Alexandru Gagniuc
· 11 years ago
033bb4b
acpi: Generate valid ACPI processor objects
by Timothy Pearson
· 10 years ago
f251a6d
cpu/intel: >= nehalem: add comments to msr finalize's
by Alexander Couzens
· 10 years ago
77b1655
vboot2: add verstage
by Stefan Reinauer
· 10 years ago
dafa12a
intel/model_206ax: update microcode
by Nicolas Reinecke
· 10 years ago
546953c
Replace hlt with halt()
by Patrick Georgi
· 10 years ago
80fb8ed
acpigen: Add and use acpigen_write_method.
by Vladimir Serbinenko
· 10 years ago
226d784
ibexpeak, bd82x6x: Move to implicit length patching
by Vladimir Serbinenko
· 10 years ago
2c9d2cf
{arch,cpu,drivers,ec}: Don't hide pointers behind typedefs
by Edward O'Callaghan
· 10 years ago
1729cd8
x86 romstage: Move stack just below RAMTOP
by Kyösti Mälkki
· 10 years ago
822bc65
ACPI: Remove CONFIG_GENERATE_ACPI_TABLES
by Vladimir Serbinenko
· 11 years ago
9944b28
cpu/intel/XXX/acpi.c: Fix coding style violation
by Martin Roth
· 10 years ago
5cfef13
cpu/intel: Fix out-of-bounds read due to off-by-one in condition
by Edward O'Callaghan
· 10 years ago
f7c55148
cpu: Trivial - drop trailing blank lines at EOF
by Edward O'Callaghan
· 10 years ago
ba92428
intel: Make monotonic timer a first class citizen
by Edward O'Callaghan
· 10 years ago
5c3f384
Replace SERIAL_CPU_INIT with PARALLEL_CPU_INIT
by Kyösti Mälkki
· 10 years ago
99ac98f
Introduce stage-specific architecture for coreboot
by Furquan Shaikh
· 10 years ago
fd33781
Move ARCH_* from board/Kconfig to cpu or soc Kconfig.
by Furquan Shaikh
· 10 years ago
20f25dd
Rename coreboot_ram stage to ramstage
by Furquan Shaikh
· 10 years ago
2c78726
PCI: Drop includes under cpu
by Kyösti Mälkki
· 11 years ago
9c70adf
intel/microcode: Remove leftover MICROCODE_INCLUDE_PATH.
by Vladimir Serbinenko
· 11 years ago
07d881a0
cpu/intel: Remove dummy terminators from microcode blobs
by Alexandru Gagniuc
· 11 years ago
bbf013c
nehalem/sandy/ivy/haswell: Enable WRPROT cache for all of flash
by Kyösti Mälkki
· 11 years ago
107f72e
Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR
by Kyösti Mälkki
· 11 years ago
66e0c4c
cpu: Rename CPU_MICROCODE_IN_CBFS to SUPPORT_CPU_UCODE_IN_CBFS
by Alexandru Gagniuc
· 11 years ago
4c3ab73
cpu: Fix spelling
by Martin Roth
· 11 years ago
2c516ed
usbdebug: Drop old includes
by Kyösti Mälkki
· 11 years ago
8ee04d7
usbdebug: Put ehci_debug_info in CAR_GLOBAL
by Kyösti Mälkki
· 11 years ago
e49679d
usbdebug: Drop temporary disables of log output
by Kyösti Mälkki
· 11 years ago
3f5f6d8
Drop prototype guarding for romcc
by Stefan Reinauer
· 11 years ago
648d166
copy_and_run: drop boot_complete parameter
by Stefan Reinauer
· 11 years ago
24d1d4b
x86: Unify arch/io.h and arch/romcc_io.h
by Stefan Reinauer
· 11 years ago
2c3f161
Intel: Update CPU microcode for Sandybridge/Ivybridge CPUs
by Stefan Reinauer
· 11 years ago
a46a712
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
by Paul Menzel
· 11 years ago
644e83b
speedstep: Deduplicate some MSR identifiers
by Patrick Georgi
· 12 years ago
223af0d
document Intel VMX locking behavior
by Mike Frysinger
· 12 years ago
23f38cd
Get rid of drivers class
by Patrick Georgi
· 12 years ago
455f4b4
Fix CONFIG_MAX_CPU set to 1 CPU build problem
by Stefan Reinauer
· 12 years ago
08067ba
ivybridge: Catch unknown CPU revisions
by Stefan Reinauer
· 12 years ago
f5a11aa
Initialize the VMX MSR
by Marc Jones
· 12 years ago
5986eda
Revert "Remove code that enables/disables VMX in coreboot on chromebooks."
by Marc Jones
· 12 years ago
bb9dff5
sandybridge: Correct reporting of cores and threads
by Stefan Reinauer
· 12 years ago
d16d576
Leave power control registers unlocked
by Sameer Nanda
· 12 years ago
41392df
Merge cpu/intel/acpi.h into cpu/intel/speedstep.h
by Nico Huber
· 12 years ago
00b579a
buildsystem: Make CPU microcode updating more configurable
by Alexandru Gagniuc
· 12 years ago
fee73df
Auto-declare chip_operations
by Kyösti Mälkki
· 12 years ago
0db6820
Synchronize rdtsc instructions
by Stefan Reinauer
· 12 years ago
51676b1
Revert "Use broadcast SIPI to startup siblings"
by Sven Schnelle
· 12 years ago
a2701c6
Revert "remove CONFIG_SERIAL_CPU_INIT"
by Sven Schnelle
· 12 years ago
5563211
CPU: Add option to set TCC activation offset
by Duncan Laurie
· 12 years ago
d6aca0b
ACPI: Add a method to notify OS to re-read _PPC
by Duncan Laurie
· 12 years ago
0eefa00
ACPI: Add function to write _PPC using NVS
by Duncan Laurie
· 12 years ago
0b7b7b6
Drop CONFIG_CPU_MODEL_NAME and fix CPU name displayed in logs
by Stefan Reinauer
· 12 years ago
c65a36e
Enable Microcode in CBFS for all SandyBridge/IvyBridge systems
by Stefan Reinauer
· 12 years ago
c0f2cfb
Fix comment to reference IvyBridge, too
by Stefan Reinauer
· 12 years ago
6d29c73
Include SandyBridge Microcode when IvyBridge is enabled
by Stefan Reinauer
· 12 years ago
22935e1
CPU: Set flex ratio to nominal TDP ratio in bootblock
by Duncan Laurie
· 12 years ago
4e4320f
CPU: Update ivybridge PP1 current limit value
by Duncan Laurie
· 12 years ago
77dbbac
CPU: Add basic support for Nominal Configurable TDP
by Duncan Laurie
· 12 years ago
999e94c
Config changes to support microcode in CBFS
by Vadim Bendebury
· 12 years ago
537b4e0
Add code to read Intel microcode from CBFS
by Vadim Bendebury
· 12 years ago
df0c822
Rename microcode include file to be model agnostic
by Vadim Bendebury
· 12 years ago
b38e0c3
Properly identify ACPI C3 states in _CST table.
by Duncan Laurie
· 12 years ago
305b19d
Remove code that enables/disables VMX in coreboot on chromebooks.
by Ronald G. Minnich
· 12 years ago
5458b9d
Intel cpus: Extend cache to cover complete Flash Device
by Kyösti Mälkki
· 12 years ago
c7fb2ae
Intel cpus: use CPU_ADDR_BITS from Kconfig during CAR
by Kyösti Mälkki
· 12 years ago
78efc4c
remove CONFIG_SERIAL_CPU_INIT
by Sven Schnelle
· 12 years ago
042c146
Use broadcast SIPI to startup siblings
by Sven Schnelle
· 12 years ago
bb31f3a
Drop config variable CPU_MODEL_INDEX
by Stefan Reinauer
· 12 years ago
c31384e
Fix up Sandybridge C state generation code
by Stefan Reinauer
· 12 years ago
3f8989e
Revamp Intel microcode update code
by Stefan Reinauer
· 12 years ago
05e740f
Replace cache control magic numbers with symbols
by Patrick Georgi
· 12 years ago
5c55463
Add support for Intel Sandybridge CPU
by Stefan Reinauer
· 12 years ago