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coreboot
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730a043fb6cb4dd3cb5af8f8640365727b598648
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src
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northbridge
/
amd
/
amdmct
/
mct_ddr3
/
mctwl.c
730a043
cpu/amd: Add initial AMD Family 15h support
by Timothy Pearson
· 9 years ago
a73b931
tree: drop last paragraph of GPL copyright header
by Patrick Georgi
· 9 years ago
b8a355d
northbridge/amd/amdmct: Fix broken AMD K10 DDR3 memory initalization
by Timothy Pearson
· 9 years ago
b890a12
Remove address from GPLv2 headers
by Patrick Georgi
· 9 years ago
a46a712
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
by Paul Menzel
· 11 years ago
a7296e7
The code is tested on my board with register DIMMs. More tests need to be
by Zheng Bao
· 14 years ago
69436e1
Fix some settings fo AMD MCT. It is based on BIOS test suite.
by Zheng Bao
· 14 years ago
99cfa1e
Multi-DIMMS on AMD ddr3 MCT channel B works.
by Kerry She
· 14 years ago
eb75f65
DDR3 support for AMD Fam10.
by Zheng Bao
· 14 years ago