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711612989930fdb3c1d60b3fc99ccb6918c3f135
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northbridge
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intel
7116129
haswell: Add VGA PCI ID mappings
by Aaron Durbin
· 12 years ago
df7be71
haswell: Add ULT device IDs
by Duncan Laurie
· 12 years ago
f72ad02
graysreef: update platform information
by Aaron Durbin
· 12 years ago
89f79a0
haswell: remove explicit pcie config accesses
by Aaron Durbin
· 12 years ago
c1989c4
haswell: add PCI id support
by Aaron Durbin
· 12 years ago
b6b5aa1
haswell: Remove logic to send dram init done to ME
by Aaron Durbin
· 12 years ago
30c3900
haswell: notes and updates.
by Aaron Durbin
· 12 years ago
8256a9b
haswell: align pei_data structure with intel-framework
by Aaron Durbin
· 12 years ago
b9adf7b
haswell: use #defines for constants in udelay.c
by Aaron Durbin
· 12 years ago
ce36b12
haswell: Add LPT LP device IDs to platform report
by Duncan Laurie
· 12 years ago
67113e9
haswell: Update GPU power management setup
by Duncan Laurie
· 12 years ago
6d04f0f
haswell: always use MMIO PCI config accesses
by Aaron Durbin
· 12 years ago
76c3700
haswell: Add initial support for Haswell platforms
by Aaron Durbin
· 12 years ago
e7ae96f
Add Intel Panther Point USB3 initialization
by Marc Jones
· 12 years ago
41dd3db
Intel e7505: provide get_top_of_ram
by Kyösti Mälkki
· 12 years ago
a46a712
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
by Paul Menzel
· 11 years ago
fd611f9
Drop CONFIG_WRITE_HIGH_TABLES
by Stefan Reinauer
· 11 years ago
0aa37c4
sconfig: rename lapic_cluster -> cpu_cluster
by Stefan Reinauer
· 12 years ago
4aff445
sconfig: rename pci_domain -> domain
by Stefan Reinauer
· 12 years ago
600784e
spi.h: Rename the spi.h to spi-generic.h
by Zheng Bao
· 12 years ago
8cc8468
Intel: Replace MSR 0xcd with MSR_FSB_FREQ
by Patrick Georgi
· 12 years ago
6fe0cab
Extend CBFS to support arbitrary ROM source media.
by Hung-Te Lin
· 12 years ago
816e9d1
Support for Celeron 1007U
by Stefan Reinauer
· 12 years ago
5079a0d
Remove assembly coded log2 function
by Ronald G. Minnich
· 12 years ago
721265b
Drop driver-y from GM45/ICH9/RK9
by Stefan Reinauer
· 12 years ago
e135ac5
Remove AMD special case for LAPIC based udelay()
by Patrick Georgi
· 12 years ago
23f38cd
Get rid of drivers class
by Patrick Georgi
· 12 years ago
2efc880
intel/gm45: new northbridge
by Patrick Georgi
· 12 years ago
3c84261
yabel: Use X86_* instead of the more verbose M.x86.REG_*
by Patrick Georgi
· 12 years ago
6446626
Use new system agent binaries
by Stefan Reinauer
· 12 years ago
313ec9d
Sandybridge: Set PEG clock gating
by Marc Jones
· 12 years ago
7e8c8e9
Add PCIe init and NMode flag to PEI data structure
by Stefan Reinauer
· 12 years ago
e8179b5
Add ddr3lv_support flag to pei_data structure
by Duncan Laurie
· 12 years ago
53508fe
pei_data.h: Fix comment
by Marc Jones
· 12 years ago
48a4a7f
Provide MRC with a console printing callback function
by Vadim Bendebury
· 12 years ago
e5a0a5d
Initial IGD OpRegion implementation
by Stefan Reinauer
· 12 years ago
ad67791
Avoid using hardcoded values in MRC cache code
by Vadim Bendebury
· 12 years ago
a1ea822
Make coreboot use the offset parameter in cbfstool create
by Stefan Reinauer
· 12 years ago
4c8027a
Make register/value lists const
by Stefan Reinauer
· 12 years ago
357bb2d
SandyBridge/IvyBridge: Use flash map to find MRC cache
by Stefan Reinauer
· 12 years ago
c6b9f92
Add missing newline in error message
by Stefan Reinauer
· 12 years ago
cf81b82
CMOS: Move MRC seed offset into upper bank
by Duncan Laurie
· 12 years ago
1e0ddf6
Fix some issues with new "reference" toolchain
by Stefan Reinauer
· 12 years ago
3e9155d
northbridge/sch: move the \n so it reads a little better
by Sebastian Andrzej Siewior
· 12 years ago
59e3e02
northbridge/sch: read the size of main memory from the proper register
by Sebastian Andrzej Siewior
· 12 years ago
50dd47b
northbridge/sch: Read the GPU memory from the correct PCI device
by Sebastian Andrzej Siewior
· 12 years ago
66fa9e2
northbridge/sch: don't overwrite hightables with GPU / TSEG memory
by Sebastian Andrzej Siewior
· 12 years ago
0279036
Remove chip.h files without config structure
by Kyösti Mälkki
· 12 years ago
72cee54
HAVE_HIGH_TABLES is gone
by Patrick Georgi
· 12 years ago
fee73df
Auto-declare chip_operations
by Kyösti Mälkki
· 12 years ago
7874e9d
Sandybridge: Fix integer overrun in romstage udelay()
by Stefan Reinauer
· 12 years ago
cf8e466
Cleanup coreboot memory table includes
by Kyösti Mälkki
· 12 years ago
9ca1c0a
Sandy/Ivy Bridge and Cougar/Panther Point: Fix names
by Stefan Reinauer
· 12 years ago
5e29f00
Intel and GFXUMA: drop redundant use of lb_add_memory_range()
by Kyösti Mälkki
· 12 years ago
7f189cc
Intel Sandybridge and UMA: use mmio_resource()
by Kyösti Mälkki
· 12 years ago
1ec5e74
Intel Sandybridge: add reserved memory as resources
by Kyösti Mälkki
· 12 years ago
d4ee808
sandybridge: reinitialize usbdebug after MRC
by Sven Schnelle
· 12 years ago
6ff1d36
Intel and GFXUMA: fix MTRR and use uma_resource()
by Kyösti Mälkki
· 12 years ago
08ef498
Intel 82810 and 82830: always room for PCI memory
by Kyösti Mälkki
· 12 years ago
b5f5652
Intel i945 and sch: no memory over 4GB
by Kyösti Mälkki
· 12 years ago
efff733
Refactor driver structs
by Patrick Georgi
· 12 years ago
1b3207e
CTDP: Only do TDP down/nominal change from TNP0
by Duncan Laurie
· 12 years ago
55864ef
ACPI: Add support for runtime config TDP down
by Duncan Laurie
· 12 years ago
f4d3623
ELOG: Add support for a monotonic boot counter in CMOS
by Duncan Laurie
· 12 years ago
696262b
More descriptive error messages in Sandybridge raminit code
by Stefan Reinauer
· 12 years ago
9c4c6ab
ELOG: Fix boot count increment for non-wake case
by Duncan Laurie
· 12 years ago
fe7b5d2
Ivybridge: fix workaround and enable PAIR
by Duncan Laurie
· 12 years ago
77dbbac
CPU: Add basic support for Nominal Configurable TDP
by Duncan Laurie
· 12 years ago
b91a0f2
Rename cache_lbmem() to cache_ramstage()
by Stefan Reinauer
· 12 years ago
6097e19
Make ACPI code detect Sandy/Ivy Bridge dynamically
by Stefan Reinauer
· 12 years ago
afcaac2
Drop (empty) sandybridge_late_initialization()
by Stefan Reinauer
· 12 years ago
baae2d2
Add support for HM70 and NM70 LPC bridge
by Stefan Reinauer
· 12 years ago
542e962
Print PCI ID of PCH during boot up
by Stefan Reinauer
· 12 years ago
c664387
Drop leading spaces from CPU name string
by Stefan Reinauer
· 12 years ago
4821489
Fix MRC cache update delays
by Stefan Reinauer
· 12 years ago
496f4a0
SandyBridge: Add another PCI device ID for northbridge
by Walter Murphy
· 12 years ago
da83a5f
Fixes to enable RC6 on IvyBridge
by Duncan Laurie
· 12 years ago
ce6e9fe
i945: Disable IGD if plugin VGA is preferred
by Patrick Georgi
· 12 years ago
8bacc40
Fix udelay() implementation for i945 romstage
by Nico Huber
· 12 years ago
cda9f93
Intel SCH northbridge: fix resource index
by Kyösti Mälkki
· 12 years ago
cc55b9b
Define global uma_memory variables
by Kyösti Mälkki
· 12 years ago
d422069
i5000: Fix resource allocation
by Sven Schnelle
· 12 years ago
34d86f0
i5000: reset system if raminit fails
by Sven Schnelle
· 12 years ago
7b48379
i5000: Add PCI ids for all i5000 flavours
by Sven Schnelle
· 12 years ago
6444bd4
i945: Reset IGD on boot
by Patrick Georgi
· 12 years ago
1454685
i5000: fix another typo
by Sven Schnelle
· 12 years ago
39b47d2
i5000: fix typos
by Sven Schnelle
· 12 years ago
1a7a7e6
i5000: enforce hard reset
by Sven Schnelle
· 12 years ago
88fc0b9
Sandybridge: Remove remnants of FDT support from MRC cache code
by Stefan Reinauer
· 12 years ago
6e901fd
Sandybridge: Fix MRC cache calculation
by Stefan Reinauer
· 12 years ago
bb11e60
Hook up MRC cache update
by Stefan Reinauer
· 12 years ago
1244f4b
Rework Sandybridge MRC cache handling
by Stefan Reinauer
· 12 years ago
e166782
Clean up #ifs
by Patrick Georgi
· 12 years ago
f125d80
Add missing newline to printk in Sandybridge init code
by Stefan Reinauer
· 12 years ago
adc05c1
Make Intel i5000 specific options only appear on i5000 systems
by Stefan Reinauer
· 12 years ago
cafedcf
Strip quotes from Sandybridge MRC blob
by Stefan Reinauer
· 12 years ago
7a3f36a
Sandybridge: Display platform information early
by Vadim Bendebury
· 12 years ago
8508cff
Update Ivybridge GT power meter tables
by Duncan Laurie
· 12 years ago
dd585b8
Update ivybridge graphics initialization
by Duncan Laurie
· 12 years ago
7b508dd
Only send ME Dram Init Done message on Sandybridge
by Duncan Laurie
· 12 years ago
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