Gitiles
Code Review Sign In
review.coreboot.org / coreboot / 70efecd4a21c4adc7cbfb5fcdbc8b9bfedbaa270 / src / mainboard / intel / emeraldlake2 / romstage.c
  1. e8e66f4 southbridge/intel/bd82x6x: Use common gpio.c by Patrick Rudolph · 8 years ago
  2. cf0e902 emeraldlake2: Support native raminit. by Vladimir Serbinenko · 8 years ago
  3. 613d3ad Move gpio.h to gpio.c on sandy and ivy. by Vladimir Serbinenko · 8 years ago
  4. ffbb3c0 Merge sandy/ivybridge romstage flow for MRC and non-MRC. by Vladimir Serbinenko · 8 years ago
  5. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  6. 9796f60 coreboot: move TS_END_ROMSTAGE to one spot by Aaron Durbin · 9 years ago
  7. 0e90dae Move TPM code out of chromeos by Vladimir Serbinenko · 9 years ago
  8. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  9. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  10. 77757c2 mainboard/*/romstage.c: Sanitize system header inclusions by Edward O'Callaghan · 10 years ago
  11. 74834e0 mainboard: Sanitize some superio include paths to be non-local by Edward O'Callaghan · 10 years ago
  12. bd79c5e Replace hlt() loops with halt() by Patrick Georgi · 10 years ago
  13. 33b535f sandy/ivy/nehalem: Remerge interrupt handling by Vladimir Serbinenko · 10 years ago
  14. 332f14b bd82x6x: Move common bd82x6x S3 detect to bd82x6x code. by Vladimir Serbinenko · 10 years ago
  15. c845b43 sandybridge: Move common northbridge finalize to northbridge code. by Vladimir Serbinenko · 10 years ago
  16. a0a3727 intel/cpu: rename car.h to romstage.h by Aaron Durbin · 10 years ago
  17. 1ab2027 Intel: Add common header file for CAR setup by Edward O'Callaghan · 10 years ago
  18. 6722f8d sandy/ivy boards: Use acpi_s3_resume_allowed() by Kyösti Mälkki · 10 years ago
  19. ea4ae2f mainboard/intel/emeraldlake2 Fix usage of GNU field designator ext by Edward O'Callaghan · 10 years ago
  20. 2d8520b CBMEM: Replace cbmem_initialize() with cbmem_recovery() by Kyösti Mälkki · 11 years ago
  21. 7893848 Intel (sandy/ivy): Avoid calling cbmem_initialize() twice by Kyösti Mälkki · 11 years ago
  22. 04134a5 sio1007: Properly build '.c' files by Marc Jones · 11 years ago
  23. c4b6f3b emeraldlake2: Clean up COM port enable by Marc Jones · 11 years ago
  24. cbf5bdf CBMEM: Always select CAR_MIGRATION by Kyösti Mälkki · 11 years ago
  25. 3d45c40 timestamps: Stash early timestamps in CAR_GLOBAL by Kyösti Mälkki · 11 years ago
  26. e28bd4a timestamps intel: Move timestamp scratchpad to chipset by Kyösti Mälkki · 11 years ago
  27. 24d1d4b x86: Unify arch/io.h and arch/romcc_io.h by Stefan Reinauer · 11 years ago
  28. 1bc9efa CBMEM: always initialize early if the board supports it by Stefan Reinauer · 11 years ago
  29. 9aeb694 hpet: common ACPI generation by Patrick Georgi · 12 years ago
  30. afcaac2 Drop (empty) sandybridge_late_initialization() by Stefan Reinauer · 12 years ago
  31. b405857 Remove CMOS Extended range enable from romstage by Duncan Laurie · 12 years ago
  32. 8a36634 Don't pre-enable SATA AHCI in romstage.c by Stefan Reinauer · 12 years ago
  33. 599e204 Clean up Emerald Lake 2 mainboard directory by Gabe Black · 12 years ago
  34. e6063fe Fix Sandybridge/Ivybridge mainboards according to code review by Stefan Reinauer · 12 years ago
  35. 6651da3 Add support for Intel Emerald Lake 2 CRB by Stefan Reinauer · 12 years ago