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coreboot
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6d1158f3a91c172a216ab88ea426844f8cc8233e
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src
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southbridge
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intel
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bd82x6x
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pch.h
6d1158f
southbridge/intel/bd82x6x native usb init: replace some magic values
by Nicolas Reinecke
· 9 years ago
33b535f
sandy/ivy/nehalem: Remerge interrupt handling
by Vladimir Serbinenko
· 10 years ago
fa1d688
sandy/ivy native: dedup romstage.c main()
by Vladimir Serbinenko
· 10 years ago
3dc12c1
bd82x6x: Consolidate early native USB init
by Vladimir Serbinenko
· 10 years ago
332f14b
bd82x6x: Move common bd82x6x S3 detect to bd82x6x code.
by Vladimir Serbinenko
· 10 years ago
7686a56
sandy/ivybridge: Native raminit.
by Vladimir Serbinenko
· 10 years ago
9c50e6a
Intel BD82x6x: LPC: Unify I/O APIC setup
by Paul Menzel
· 11 years ago
3f5f6d8
Drop prototype guarding for romcc
by Stefan Reinauer
· 11 years ago
783f226
Add bd82x6x PCH functions to SMM
by Marc Jones
· 11 years ago
e7ae96f
Add Intel Panther Point USB3 initialization
by Marc Jones
· 12 years ago
a46a712
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
by Paul Menzel
· 11 years ago
d4bc067
SPI: Add early romstage SPI driver using hardware sequencing
by Duncan Laurie
· 12 years ago
924342b
SPI: Add Fast Read to the OPMENU for locked down SPI
by Duncan Laurie
· 12 years ago
9d81c19
PCH: Add register descriptions used by IGD OpRegion
by Stefan Reinauer
· 12 years ago
9aeb694
hpet: common ACPI generation
by Patrick Georgi
· 12 years ago
16b022a
Perform additional programming requirements for SATA
by Stefan Reinauer
· 12 years ago
cfb64bd
SATA: Add option to configure gen3 transmitter
by Duncan Laurie
· 12 years ago
800e950
ELOG: Log boot-time events found in southbridge
by Duncan Laurie
· 12 years ago
22935e1
CPU: Set flex ratio to nominal TDP ratio in bootblock
by Duncan Laurie
· 12 years ago
b9fe01c
Add an option to enable PCIe root port coalescing
by Duncan Laurie
· 12 years ago
8e07382
Add support for Intel Panther Point PCH
by Stefan Reinauer
· 12 years ago