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review.coreboot.org / coreboot / 6c1e81059dc928df6546289073ae61939b52b196 / src / soc / imgtec / pistachio / ddr3_init.c
  1. 721f299 imgtec/pistachio: DDR2, DDR3: DLL reset set by Ionela Voinescu · 8 years ago
  2. 6b95406 imgtec/pistachio: DDR2, DDR3: DQS gate early by Ionela Voinescu · 8 years ago
  3. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 8 years ago
  4. ba71ca3 Remove address from GPLv2 headers by Patrick Georgi · 8 years ago
  5. 3fa1ad0 pistachio: add DDR3 initialization code by Ionela Voinescu · 8 years ago