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review.coreboot.org / coreboot / 6b688f5329e560ef432f6ea281b2fe3d905ef297 / src / vendorcode / amd / agesa / f16kb / Proc / Fch
  1. 6b688f5 src: use ARRAY_SIZE where possible by Patrick Georgi · 3 years, 6 months ago
  2. 30935b6 vendorcode/amd: Fix typo in *is defined* in comments by Paul Menzel · 3 years, 11 months ago
  3. 8e6d5f2 {include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistent by Subrata Banik · 4 years ago
  4. 823063c AGESA f16kb vendorcode: Split to Makefile.inc files by Kyösti Mälkki · 7 years ago
  5. cc19806 amd/agesa/f16kb: Allow SATA Gen3 by Fabian Kunkel · 8 years ago
  6. 88db14d AGESA fam15tn fam16kb: Fix missing FCH function prototypes by Kyösti Mälkki · 10 years ago
  7. 6b583a4 vendorcode/amd/agesa: Do not hardcode ROM base address by Alexandru Gagniuc · 10 years ago
  8. abd119d AMD IMC AGESA: Access the data in stack by correct length by Zheng Bao · 11 years ago
  9. 7b6d412 vendorcode/amd/agesa/f16kb: Update Kabini PI from v1.0.0.0 to v1.0.0.7 by WANG Siyuan · 11 years ago
  10. a9b01d1 AMD f16kb: use AZ_PIN in Kconfig to customize AZALIA_PIN in Yangtze by WANG Siyuan · 11 years ago
  11. abebe80 AMD SATA: Correct "them implement" to "then implement" in comments by Paul Menzel · 11 years ago
  12. affe85f AMD Kabini: Add AGESA/PI code for new processor family by Siyuan Wang · 11 years ago