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review.coreboot.org / coreboot / 6b45ee44a9bbccb4dc42ea454aa20ef7d02a9fd1 / src / soc / intel / skylake / chip_fsp20.c
  1. 6b45ee4 soc/intel/skylake: Add option to enable/disable EIST by Subrata Banik · 7 years ago
  2. ffe5810 soc/intel/skylake: Add option to disable host reads to PMC XRAM by Rizwan Qureshi · 8 years ago
  3. f4c4ab9 soc/intel/skylake: Fix remaining issues detected by checkpatch by Lee Leahy · 7 years ago
  4. b2aac85 intel/skylake: Add devicetree settings for acoustic noise mitigation by Duncan Laurie · 7 years ago
  5. 0da186c soc/intel/skylake: indicate voltage margining enabled/disabled by Rizwan Qureshi · 7 years ago
  6. c2c8a74 soc/intel/skylake: Enable Systemagent IMGU by Rizwan Qureshi · 8 years ago
  7. c248044 soc/intel/skylake: Fix broken suspend-resume by Furquan Shaikh · 7 years ago
  8. 25c7d93 soc/intel/skylake: Disable s0ix if not enabled in devicetree by Duncan Laurie · 7 years ago
  9. a4b11e5c soc/intel/skylake: Perform CPU MP Init before FSP-S Init by Subrata Banik · 8 years ago
  10. 7a0044b Revert: soc/intel/skylake: Set FSP-S UPD PchHdaIDispCodecDisconnect to 1 by Duncan Laurie · 8 years ago
  11. 32997fb soc/intel/skylake: Set FSP-S UPD PchHdaIDispCodecDisconnect to 1 by Barnali Sarkar · 8 years ago
  12. 7d48410 skylake: Do not pass VBT to FSP if display init not required by Duncan Laurie · 8 years ago
  13. 6c191d8 romstage_handoff: add helper to determine resume status by Aaron Durbin · 8 years ago
  14. 6467014 soc/intel/skylake: Use SendVrMbxCmd1 for FSP 2.0 by Rizwan Qureshi · 8 years ago
  15. eedf6d8 soc/intel/skylake: Disable Legacy PME for Root ports by Naresh G Solanki · 8 years ago
  16. 2c3054c soc/intel/skylake: Add USB Port Over Current (OC) Pin programming by Subrata Banik · 8 years ago
  17. c6ec8dd fsp2_0: implement stage cache for silicon init by Brandon Breitenstein · 8 years ago
  18. ed14a4e soc/intel/skylake: move i2c voltage config to own variable by Aaron Durbin · 8 years ago
  19. a2d4062 soc/intel/skylake: Add FSP 2.0 support in ramstage by Naresh G Solanki · 8 years ago
  20. 1222a73 skylake: Add initial FSP2.0 support by Rizwan Qureshi · 8 years ago[Copied (61%) from src/soc/intel/skylake/include/soc/ramstage.h]
  21. 2f6fb9f skylake: Add ACPI device name handler by Duncan Laurie · 8 years ago
  22. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  23. 94b856e FSP 1.1: Move common FSP code by Lee Leahy · 9 years ago
  24. 1d14b3e soc/intel: Add Skylake SOC support by Lee Leahy · 9 years ago
  25. b000513 soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC by Lee Leahy · 9 years ago