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review.coreboot.org / coreboot / 6aca7e6bec07c583de18752aa7a8639b64e9bd93 / src / southbridge / intel / bd82x6x / pch.h
  1. 6aca7e6 nb/intel/sandybridge: Move DMI init code by Patrick Rudolph · 5 years ago
  2. bf74350 sb/intel/sandybridge/early_pch: Make DMI init more readable by Patrick Rudolph · 5 years ago
  3. 45d4b17 nb/intel/sandybridge: Move southbridge code to bd82x6x by Patrick Rudolph · 5 years ago
  4. e2f0a5f sb/intel/bd82x6x: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB by Patrick Rudolph · 5 years ago
  5. cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
  6. 7b42811 sb/intel: Use common RCBA MACROs by Peter Lemenkov · 6 years ago
  7. f0a017f sb/intel/bd828x6x: Make CONFIG_ELOG=y compile by Arthur Heymans · 6 years ago
  8. 63626b1 sb/intel/common: Create a common PCH finalise implementation by Tristan Corrick · 6 years ago
  9. 6b93112 sb/intel: Deduplicate vbnv_cmos_failed and rtc_init by Patrick Rudolph · 6 years ago
  10. 9b7ae2f mb/lenovo/*/romstage: Use macros instead of magic numbers by Peter Lemenkov · 6 years ago
  11. dc03528 sb/intel/bd82x6x: Don't use device_t by Elyes HAOUAS · 6 years ago
  12. 48b2425 sb/intel/bd82x6x: Fix watchdog by Patrick Rudolph · 6 years ago
  13. 1f2ae91 sb/intel/common: Make RCBA manipulation MACROs common by Arthur Heymans · 6 years ago
  14. 58a8953 Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location" by Arthur Heymans · 6 years ago
  15. 2526fd4 src: Remove space after `defined` by Elyes HAOUAS · 6 years ago
  16. 68f6888 Revert "model_206ax: Use parallel MP init" by Arthur Heymans · 6 years ago
  17. 5fbe788 model_206ax: Use parallel MP init by Arthur Heymans · 7 years ago
  18. a050817 sb/intel/common: Add common code for SMM setup and smihandler by Arthur Heymans · 7 years ago
  19. d2d2aef sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location by Arthur Heymans · 7 years ago
  20. ff4025c sb/intel/bd82x6x: Reduce function-disable mess by Nico Huber · 7 years ago
  21. 85dc0d8 intel/bd82x6x: Fix a small mistake in DIR_ROUTE by Tobias Diedrich · 7 years ago
  22. 97620038 southbridge/intel/bd82x6x: refactor rtc failure checking by Aaron Durbin · 7 years ago
  23. 16fe790 sb/intel/*: Use common SMBus functions by Arthur Heymans · 7 years ago
  24. 7a1a3ad southbridge/intel: add IS_ENABLED() around Kconfig symbol references by Martin Roth · 7 years ago
  25. 87b5ff0 sb/intel/bd82x6x/early_usb: Use register name by Patrick Rudolph · 7 years ago
  26. 7565cf1 sb/intel/bd82x6x/finalize: Lock ETR3 CF9GR by Patrick Rudolph · 7 years ago
  27. c368620 sb/intel/bd82x6x/finalize: Use register name by Patrick Rudolph · 7 years ago
  28. 0c04720 sb/intel/bd82x6x: Add TCO_Lock in finalize step by Dennis Wassenberg · 9 years ago
  29. dac8240 southbridge/intel/bd82x6x: transition away from device_t by Antonello Dettori · 8 years ago
  30. b0f8151 chromeos mainboards: remove chromeos.asl by Aaron Durbin · 8 years ago
  31. 340898f southbridge/intel/bd82x6x: use common Intel ACPI hardware definitions by Aaron Durbin · 8 years ago
  32. e8e66f4 southbridge/intel/bd82x6x: Use common gpio.c by Patrick Rudolph · 9 years ago
  33. b2dae79 sb/intel/bd82x6x: Assign unique bus/dev/fn for I/O APIC + HPETs by Nico Huber · 9 years ago
  34. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  35. c16e9dfa Create i945-ivy smm tseg init based on ivy code. by Vladimir Serbinenko · 9 years ago
  36. a3e41c0 Migrate 206ax to SMM_MODULES by Vladimir Serbinenko · 9 years ago
  37. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  38. b85a87b intel SMI handlers: Refactor GPI SMI/SCI routing by Kyösti Mälkki · 10 years ago
  39. 59aef5c southbrige/intel/bd82x6x: add XHCI overcurrent map config by Nicolas Reinecke · 9 years ago
  40. 0b29a7b southbrige/intel/bd82x6x: XHCI replace magic values by Nicolas Reinecke · 9 years ago
  41. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  42. 6d1158f southbridge/intel/bd82x6x native usb init: replace some magic values by Nicolas Reinecke · 10 years ago
  43. 33b535f sandy/ivy/nehalem: Remerge interrupt handling by Vladimir Serbinenko · 10 years ago
  44. fa1d688 sandy/ivy native: dedup romstage.c main() by Vladimir Serbinenko · 10 years ago
  45. 3dc12c1 bd82x6x: Consolidate early native USB init by Vladimir Serbinenko · 10 years ago
  46. 332f14b bd82x6x: Move common bd82x6x S3 detect to bd82x6x code. by Vladimir Serbinenko · 10 years ago
  47. 7686a56 sandy/ivybridge: Native raminit. by Vladimir Serbinenko · 10 years ago
  48. 9c50e6a Intel BD82x6x: LPC: Unify I/O APIC setup by Paul Menzel · 11 years ago
  49. 3f5f6d8 Drop prototype guarding for romcc by Stefan Reinauer · 11 years ago
  50. 783f226 Add bd82x6x PCH functions to SMM by Marc Jones · 12 years ago
  51. e7ae96f Add Intel Panther Point USB3 initialization by Marc Jones · 12 years ago
  52. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  53. d4bc067 SPI: Add early romstage SPI driver using hardware sequencing by Duncan Laurie · 12 years ago
  54. 924342b SPI: Add Fast Read to the OPMENU for locked down SPI by Duncan Laurie · 12 years ago
  55. 9d81c19 PCH: Add register descriptions used by IGD OpRegion by Stefan Reinauer · 12 years ago
  56. 9aeb694 hpet: common ACPI generation by Patrick Georgi · 12 years ago
  57. 16b022a Perform additional programming requirements for SATA by Stefan Reinauer · 12 years ago
  58. cfb64bd SATA: Add option to configure gen3 transmitter by Duncan Laurie · 12 years ago
  59. 800e950 ELOG: Log boot-time events found in southbridge by Duncan Laurie · 12 years ago
  60. 22935e1 CPU: Set flex ratio to nominal TDP ratio in bootblock by Duncan Laurie · 12 years ago
  61. b9fe01c Add an option to enable PCIe root port coalescing by Duncan Laurie · 12 years ago
  62. 8e07382 Add support for Intel Panther Point PCH by Stefan Reinauer · 12 years ago