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review.coreboot.org / coreboot / 6a3d64ab1ca29e07b0ce4413329f22d0adc7ccc3 / src / southbridge / amd / pi / hudson / pci_devs.h
  1. 6a3d64a nb,sb/amd/pi/*/pci_devs: drop unused BUS0 define by Felix Held · 7 months ago
  2. 70d1c72 sb/amd/pi/hudson: remove unused Bolton PI FCH code by Felix Held · 3 years, 3 months ago
  3. 8ccc8fd sb/amd/*/*/pci_devs.h: Reduce the difference by Elyes HAOUAS · 3 years, 9 months ago
  4. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 2 months ago
  5. 182dbde src/southbridge: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 3 months ago
  6. f3f36fa src (minus soc and mainboard): Remove copyright notices by Patrick Georgi · 4 years, 4 months ago
  7. cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
  8. 3067012 amd/pi: Add AMD fam16h TPM ACPI path support by Philipp Deppenwiese · 7 years ago
  9. c1f3233 amd/pi/hudson: Clean up whitespace in header files by Marshall Dawson · 7 years ago
  10. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  11. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  12. 9cfa742 southbridge/amd/pi: Add the bolton definitions by Dave Frodin · 9 years ago
  13. bc21a41 southbridge/amd/pi: Rename Avalon to Hudson by Dave Frodin · 9 years ago[Renamed from src/southbridge/amd/pi/avalon/pci_devs.h]
  14. 6840210 southbridge/amd/pi/avalon/pci_devs.h: Correct define `EHCI3_DEV` by Paul Menzel · 10 years ago
  15. e8b4da2 AMD: Isolate AGESA and PI build environments for southbridge by Kyösti Mälkki · 10 years ago