Gitiles
Code Review Sign In
review.coreboot.org / coreboot / 683e77e479d7204bdfaf4d9b468901aafe5225e3 / src / drivers / intel / fsp1_1 / cache_as_ram.inc
  1. 683e77e drivers/intel/fsp1_1/cache_as_ram.inc: Reduce max line length to 80 by Frans Hendriks · 5 years ago
  2. cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
  3. 5c29daa buildsystem: Promote rules.h to default include by Kyösti Mälkki · 8 years ago
  4. ee2e936 arch/x86: Unify bootblock MMX register usage by Kyösti Mälkki · 6 years ago
  5. 613da18 drivers/intel/fsp1_1/cache_as_ram.inc: Dont include soc/car_setup.S by Frans Hendriks · 6 years ago
  6. 0d8f1da src/drivers: Get rid of whitespace before tab by Elyes HAOUAS · 6 years ago
  7. e18e642 src: change coreboot to lowercase by Martin Roth · 7 years ago
  8. 7753731 src/drivers: Capitalize CPU, RAM and ACPI by Elyes HAOUAS · 8 years ago
  9. fbdc719 intel/skylake: Implement native Cache-as-RAM (CAR) by Subrata Banik · 9 years ago
  10. fb50983 intel/fsp: Add post codes for FSP phases by Duncan Laurie · 9 years ago
  11. 2524be4 fsp1_1: pass ROM_SIZE to FSP for cacheable RO region by Aaron Durbin · 9 years ago
  12. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  13. 909c512 fsp1_1: add verstage support by Aaron Durbin · 9 years ago
  14. e6af4be intel fsp1_1: prepare for romstage vboot verification split by Aaron Durbin · 9 years ago
  15. e1ecfc9 intel: update common and FSP cache-as-ram parameters by Aaron Durbin · 9 years ago
  16. a887492 FSP: Pass FSP image base address to find_fsp by Lee Leahy · 9 years ago
  17. 681012a drivers/intel/fsp_1_1: Remove useless #ifndef/#error pairs by Alexandru Gagniuc · 9 years ago
  18. 4a8c19c FSP 1.1: Bring source up-to-date by Lee Leahy · 9 years ago
  19. b5ad827 drivers/intel: Update FSP 1.1 Driver by Lee Leahy · 9 years ago
  20. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  21. 3dad489 FSP 1.1 Comparison Base by Lee Leahy · 9 years ago