1. 5e02bc6 Make PCI CONF2 support a compile time option by Stefan Reinauer · 12 years ago
  2. bf729ba Add more timestamps in coreboot. by Stefan Reinauer · 12 years ago
  3. 10fea92 Fix coreboot makefiles not to produce half baked output. by Vadim Bendebury · 12 years ago
  4. cde7801 Add timestamps for selfboot and acpi wake by Duncan Laurie · 12 years ago
  5. 3008bbad Add TPM support to coreboot by Stefan Reinauer · 12 years ago
  6. 00093a8 Add an option to keep the ROM cached after romstage by Stefan Reinauer · 12 years ago
  7. 1afe51a Add native memset() function on x86 by Stefan Reinauer · 12 years ago
  8. 0054afa Add faster, architecture dependent memcpy() by Stefan Reinauer · 12 years ago
  9. 19e7e7d Add infrastructure for global data in the CAR phase of boot by Gabe Black · 12 years ago
  10. 4d04a71 Detect whether the OXPCIE card is really present while in the ROM stage. by Gabe Black · 12 years ago
  11. 22c0468 Refactor publishing CBMEM addresses through coreboot table. by Vadim Bendebury · 12 years ago
  12. 2e43867 Add timestamp table pointer to the coreboot table. by Vadim Bendebury · 12 years ago
  13. 1078c67 CBMEM CONSOLE: Add code using the new console driver. by Vadim Bendebury · 12 years ago
  14. 2172f61 Makefile: rename linker intermediate variable by Kyösti Mälkki · 12 years ago
  15. 06253cd Avoid using CPUID in SMBIOS tables. Check for CPUID otherwise claim 486 class cpu. by Rudolf Marek · 12 years ago
  16. 06c0429 Another indirection for normal/fallback bootblock by Patrick Georgi · 12 years ago
  17. d11ca1d Rename AMD_AGESA to CPU_AMD_AGESA by Kyösti Mälkki · 12 years ago
  18. b58651b Use search path when building dependencies by Patrick Georgi · 12 years ago
  19. d4d5e4d Via Epia-N and C3: Set ioapic delivery type in Kconfig by Patrick Georgi · 12 years ago
  20. 30cc480 No need to setup include paths with .s files by Patrick Georgi · 12 years ago
  21. 32829ca If the memory mapped UART isn't present, leave it out of the cb tables. by Gabe Black · 12 years ago
  22. 294edb2 Increase size of the coreboot table area by Stefan Reinauer · 12 years ago
  23. 66ecdc5 Fix compilation when USE_OPTION_TABLE is not defined. by Duncan Laurie · 12 years ago
  24. 0523989 Fix coreboot table size calculations. by Vadim Bendebury · 12 years ago
  25. c75bfde Clean up use of CONFIG_ variables in coreboot_table.c by Stefan Reinauer · 12 years ago
  26. c8feedd Unify Local APIC address definitions by Patrick Georgi · 12 years ago
  27. c5fc7db Move C labels to start-of-line by Patrick Georgi · 12 years ago
  28. 730c0ee Fix x86 cpu_phys_address_size by Kyösti Mälkki · 12 years ago
  29. 93dd07f Exit building if romstage.bin is larger than size of XIP by zbao · 12 years ago
  30. aff6dc2 Move SeaBIOS output out of coreboot source tree by Stefan Reinauer · 12 years ago
  31. 7363ca3 X86: fix cpu_phys_address_size() by Sven Schnelle · 12 years ago
  32. acf2aab pci_ops_mmconf: Move conditional compilation to Makefile by Vikram Narayanan · 12 years ago
  33. 31b680b pci_ops_conf: Indentation fixes by Vikram Narayanan · 12 years ago
  34. 26dd361 pci_ops_mmconf: Indentation fixes by Vikram Narayanan · 12 years ago
  35. c6daaa7 Leave SSE and MMX instructions enabled in coreboot by Stefan Reinauer · 12 years ago
  36. 950f20a Add coreboot version to id area by Patrick Georgi · 12 years ago
  37. adfbcb79 MTRR: get physical address size from CPUID by Sven Schnelle · 12 years ago
  38. 8d84613 ACPI: mark empty get_cst_entries() weak by Sven Schnelle · 12 years ago
  39. f28dbe0 Only BSP CPU writes CMOS in bootblock code by Kyösti Mälkki · 12 years ago
  40. b192df4 Fix ldscript for bootblock .rom section by Kyösti Mälkki · 12 years ago
  41. eafb18b Bootblock does not need a unique boot_cpu() by Kyösti Mälkki · 12 years ago
  42. 0dbfb54 Remove unused code files and cosmetic changes by Kyösti Mälkki · 12 years ago
  43. 2a40ebc Fix post_code in 16bit entry by Kyösti Mälkki · 12 years ago
  44. 641dd71 Inline Makefile.bootblock.inc by Patrick Georgi · 12 years ago
  45. 5ff7c13 remove trailing whitespace by Stefan Reinauer · 12 years ago
  46. 3954b0a Fix coreboot updates by Patrick Georgi · 12 years ago
  47. 914377e Get rid of the old romstage-as-bootblock ROM layout by Patrick Georgi · 12 years ago
  48. 1da1046 Get rid of AUTO_XIP_ROM_BASE by Patrick Georgi · 12 years ago
  49. 07b4215 Move linux 2.6.11 workaround to generic code by Patrick Georgi · 12 years ago
  50. 5460097 SPEEDSTEP: write _CST tables by Sven Schnelle · 12 years ago
  51. 0b86c76 ACPI: Add function for writing _CST tables by Sven Schnelle · 12 years ago
  52. d1bc331 Extend coreboot table entry for serial ports by Stefan Reinauer · 12 years ago
  53. 9ea33e9 Add macros for 64bit byte order swapping by Stefan Reinauer · 12 years ago
  54. 939103c IOAPIC: fix bitmask by Kyösti Mälkki · 12 years ago
  55. 6a11333 Drop eh_frame instead of moving it into the image. by Stefan Reinauer · 12 years ago
  56. 2d17299 cbfs_and_run_core() is not part of the API, make it static. by Stefan Reinauer · 12 years ago
  57. f830752 reformat Makefile.bootblock.inc (>80 lines per char) by Stefan Reinauer · 12 years ago
  58. 499af70 Add eh_frame to rom section to fix compilation of coreboot with gcc 4.6 by Stefan Reinauer · 12 years ago
  59. 513eb5a Prevent build breakage without consoles enabled by Stefan Reinauer · 13 years ago
  60. c1efb90 refactor vesa mode setting code and bootsplash code by Stefan Reinauer · 12 years ago
  61. 8d427ec Fix romstage creation with gcc 4.6 and CAR targets by Stefan Reinauer · 12 years ago
  62. b0a9c5c mptable: Refactor mptable generation some more by Patrick Georgi · 12 years ago
  63. c75c79b mptable: Get rid of fixup_virtual_wire by Patrick Georgi · 12 years ago
  64. 6eb7a53 mptable: Refactor lintsrc generation by Patrick Georgi · 12 years ago
  65. 4e22a3b Add acpi_get_sleep_type() to i82371eb and P2B _PTS/_WAK methods by Tobias Diedrich · 13 years ago
  66. 164bcfd Add automatic SMBIOS table generation by Sven Schnelle · 12 years ago
  67. 3ddb6b8 Add xhcbios and ahcibios rom handling by efdesign98 · 12 years ago
  68. a68555f Do full flush on uart8250 only at end of printk. by Kevin O'Connor · 12 years ago
  69. ba48281 whitespace-only changes in acpi.c, replaced spaces with tabs by Cristian Măgherușan-Stanciu · 12 years ago
  70. d367b00 Add the coreboot config to CBFS by Cristian Măgherușan-Stanciu · 12 years ago
  71. b2ecd81 We don't have pausing versions of single-IO instructions. by Stefan Reinauer · 13 years ago
  72. 4885daa Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an by Stefan Reinauer · 13 years ago
  73. 3e4fb9d more ifdef -> if fixes. by Stefan Reinauer · 13 years ago
  74. d4814bd more ifdef -> if fixes by Stefan Reinauer · 13 years ago
  75. 1d888a9 some ifdef --> if fixes by Stefan Reinauer · 13 years ago
  76. bbd2f21 Simplify coreboot's console/console.h by Stefan Reinauer · 13 years ago
  77. 52ffb2b Recently the 3 projects using the new AMD reference code have been by Scott Duplichan · 13 years ago
  78. a7163f1 bootblock updates: by Stefan Reinauer · 13 years ago
  79. 6aef554 sorry for breaking the tree. by Stefan Reinauer · 13 years ago
  80. b77a73e comment cosmetics in bootblock.ld by Stefan Reinauer · 13 years ago
  81. e50952f add FILO easy payload option by Stefan Reinauer · 13 years ago
  82. 40e42a8 fix coreboot compilation without serial console enabled. by Stefan Reinauer · 13 years ago
  83. 1fdfed1 add some comments to walkcbfs.S by Stefan Reinauer · 13 years ago
  84. 31853d8 - drop remaining CONFIG_ROM_IMAGE_SIZE by Stefan Reinauer · 13 years ago
  85. 8902502 drop incorrectly used CONFIG_ROM_IMAGE_SIZE and unused CONFIG_ARCH by Stefan Reinauer · 13 years ago
  86. 5005bb06 Unify use of post_code by Alexandru Gagniuc · 13 years ago
  87. 61aee5f In 2007 Adrian Reber suggested that we drop ASSEMBLY in favor of __ASSEMBLER__. by Stefan Reinauer · 13 years ago
  88. d69438e BUILD: add missing config.h dependency by Sven Schnelle · 13 years ago
  89. fab35e3 Move cmos.default handling to bootblock by Patrick Georgi · 13 years ago
  90. 0822ad8 This code fixes a number of build issues related to the AMD Agesa code. The particular issues are global variables existing in romstage and the use of GCC intrinsics in the build. The former issue will be addressed shortly, and the latter issue requires community assistance. This code is dependent on the AMD Family 14h mainboard code. by Frank Vibrans · 13 years ago
  91. b1d1c4d Reliably build arbitrary Kconfig-based revisions of SeaBIOS by Peter Stuge · 13 years ago
  92. ff9d78c Replace special rules for auxiliary files by cbfs-files-y entries by Patrick Georgi · 13 years ago
  93. 5c0bca2 Inverse two arguments of cbfs-files-y and adapts its users (one of which already used the new order) by Patrick Georgi · 13 years ago
  94. e3509fd Pass all required toolchain parts to SeaBIOS correctly by Stefan Reinauer · 13 years ago
  95. 16ce01b This patch gets usbdebug console working in romstage. by Stefan Reinauer · 13 years ago
  96. 679d38b This patch fixes an 'write_tables: coreboot table didn't fit (f0221)' issue. by Josef Kellermann · 13 years ago
  97. a3eb534 ... And fix the other compile time issues in cmos_layout.bin support by Patrick Georgi · 13 years ago
  98. 4adc9eb The cn700.c code references mainboard_interrupt_handlers() which isn't by Kevin O'Connor · 13 years ago
  99. cef3b89 Report if cmos_layout.bin can't be found when it should. by Patrick Georgi · 13 years ago
  100. 2447937 Move option table (cmos.layout's binary representation) by Patrick Georgi · 13 years ago