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review.coreboot.org / coreboot / 66b0d55d326540e400ad3fa5130666dbd03b9694 / src / soc / intel / sch / sch.h
  1. 4bab6e7 intel/sch: Merge northbridge and southbridge in src/soc by Stefan Reinauer · 8 years ago[Renamed (75%) from src/northbridge/intel/sch/sch.h]
  2. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  3. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  4. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  5. 089a510 northbridge/intel: Do not define include guard as 1 by Edward O'Callaghan · 10 years ago
  6. 59fb82a intel/sch: Use MMCONF_BASE_ADDRESS by Kyösti Mälkki · 11 years ago
  7. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 12 years ago
  8. 405721d Fix a few whitespace and coding style issues. by Uwe Hermann · 14 years ago
  9. be61a17 Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 board which uses it. by Patrick Georgi · 14 years ago