Gitiles
Code Review
Sign In
review.coreboot.org
/
coreboot
/
66b0d55d326540e400ad3fa5130666dbd03b9694
/
src
/
soc
/
intel
/
quark
/
include
94b971a
soc/intel/quark: Fix errors detected by checkpatch
by Lee Leahy
· 7 years ago
e165423
mainboard/intel/quark: Add FSP selection values
by Lee Leahy
· 8 years ago
5e07a7e
soc/intel/quark: Switch to using serial routines for FSP
by Lee Leahy
· 8 years ago
f26fc0f
soc/intel/quark: Add FSP 2.0 romstage support
by Lee Leahy
· 8 years ago
102f625
soc/intel/quark: Add FSP 2.0 boot block support
by Lee Leahy
· 8 years ago
5fafc6a
soc/intel/quark: Support access to CPU CR registers
by Lee Leahy
· 8 years ago
38e0cc0
soc/intel/quark: Add header files for FSP 2.0
by Lee Leahy
· 8 years ago
01728bb
soc/intel/quark: Prepare for FSP2.0 support
by Lee Leahy
· 8 years ago
3d0e3cf
soc/intel/quark: Initialize MTRRs in bootblock
by Lee Leahy
· 8 years ago
0c1843a
soc/intel/quark: Fix car_stage_entry routine name.
by Lee Leahy
· 8 years ago
4c72d36
Remove extra newlines from the end of all coreboot files.
by Martin Roth
· 8 years ago
ae738ac
cpu/x86: Support CPUs without rdmsr/wrmsr instructions
by Lee Leahy
· 8 years ago
f1e22d5
soc/intel/quark: use common Intel ACPI hardware definitions
by Aaron Durbin
· 8 years ago
660c67a
soc/intel/quark: Add host bridge access support
by Lee Leahy
· 8 years ago
9007ffd
PCI: Use PCI_DEVFN macro instead of DEV_FUNC
by Werner Zeh
· 8 years ago
ce9e21a
soc/intel/quark: Add C bootblock
by Lee Leahy
· 8 years ago
bc518d5
quark: Enable HSUART0 as console
by Lee Leahy
· 8 years ago
ac78db3
soc/intel/quark: Move UART init into romstage.c
by Lee Leahy
· 8 years ago
56c99f2
soc/intel/quark: Set temporary I2C base address
by Lee Leahy
· 8 years ago
d549368
soc/intel/quark: Conditionally define BIT names
by Lee Leahy
· 8 years ago
7f4b053
soc/intel/quark: Clear SMI interrupts and wake events
by Lee Leahy
· 8 years ago
5ef051a
soc/intel/quark: Add PCIe reset support
by Lee Leahy
· 8 years ago
fd45658
soc/intel/quark: Add USB device port support
by Lee Leahy
· 8 years ago
ac690b1
soc/intel/quark: Add I2C support
by Lee Leahy
· 8 years ago
5d9f5ff
soc/intel/quark: Fix spelling error
by Lee Leahy
· 8 years ago
3f0fe68
soc/intel/quark: Perform GPIO initialization
by Lee Leahy
· 8 years ago
083da16
soc/intel/quark: Add GPIO register access
by Lee Leahy
· 8 years ago
4c56a58
soc/intel/quark: Add LPC symbols
by Lee Leahy
· 8 years ago
76684bf
soc/intel/quark: Reformat include/soc/pci_devs.h
by Lee Leahy
· 8 years ago
c1cbc60
soc/intel/quark: Add Ioh.h from EDK-II
by Lee Leahy
· 8 years ago
3716f39
soc/intel/quark/include/soc: Update the Intel license
by Lee Leahy
· 8 years ago
4c3f5dc
soc/intel/quark: Add script time delay support
by Lee Leahy
· 8 years ago
63e3dff
soc/intel/quark: Add temperature sensor support
by Lee Leahy
· 8 years ago
4dd34ee
soc/intel/quark: Add USB PHY initialization
by Lee Leahy
· 8 years ago
293d1e3
soc/intel/quark: Add IntelQNCConfig.h from EDK-II
by Lee Leahy
· 8 years ago
d75ed0b
soc/intel/quark: Disable the ROM shadow
by Lee Leahy
· 9 years ago
d76d60b
soc/intel/quark: Set the UPD values for MemoryInit
by Lee Leahy
· 9 years ago
a6de547
soc/intel/quark: Initialize some of the FADT base registers
by Lee Leahy
· 9 years ago
d3de85c
soc/intel/quark: Add the initial pieces required for ACPI tables
by Lee Leahy
· 9 years ago
f55f3e6
soc/intel/quark: Use single ID value for HSUART1
by Lee Leahy
· 9 years ago
535333d
soc/intel/quark: Establish the Memory Map
by Lee Leahy
· 9 years ago
89c61b5
soc/intel/quark: Report CPU info
by Lee Leahy
· 9 years ago
43cdff6
soc/intel/quark: MTRR support
by Lee Leahy
· 9 years ago
87df8d0
soc/intel/quark: Enable Serial Port
by Lee Leahy
· 9 years ago
9fd0895
soc/intel/quark: Enable ESRAM
by Lee Leahy
· 9 years ago
2ed7eb7
soc/intel/quark: Add minimal Quark SoC X1000 files
by Lee Leahy
· 9 years ago