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review.coreboot.org / coreboot / 66b0d55d326540e400ad3fa5130666dbd03b9694 / src / soc / dmp / vortex86ex / northbridge.c
  1. 038e724 src/soc: Capitalize CPU, ACPI, RAM and ROM by Elyes HAOUAS · 8 years ago
  2. 5caf89b dmp/vortex86ex: Merge northbridge and southbridge into soc by Stefan Reinauer · 8 years ago[Renamed from src/northbridge/dmp/vortex86ex/northbridge.c]
  3. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  4. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  5. 42f4651 CBMEM northbridges: Remove references to global high_tables_base by Kyösti Mälkki · 11 years ago
  6. 33e5df3 Set PCI bus operations at buildtime for ramstage by Kyösti Mälkki · 11 years ago
  7. 8b9d4f3 Vortex86EX northbridge.c : Remove Vortex86DX PCI N/B related code. by Andrew Wu · 11 years ago
  8. 0651072 Add support for DMP Vortex86EX PCI northbridge. by Andrew Wu · 11 years ago