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review.coreboot.org / coreboot / 6446626c1e575bf77a795f92ceead167e731990c / src / northbridge / amd
  1. becacec AMD G34 CPU: change lapic_id in northbridge.c to accommodate G34 CPU by Siyuan Wang · 10 years ago
  2. 6f05c2eb AMD rd890 late.c: Don't enable PCIe ports after PCIe init. by Siyuan Wang · 10 years ago
  3. fa678bb AMD agesa family15: PCI domain should scan bus from 0x18.0 by Siyuan Wang · 10 years ago
  4. 0279036 Remove chip.h files without config structure by Kyösti Mälkki · 11 years ago
  5. 128c7d7 agesa fam15 northbridge: change lapic_id to accommodate two CPUs by Siyuan Wang · 11 years ago
  6. 87213b6 Fix AMD UMA for RS780 by Kyösti Mälkki · 11 years ago
  7. c33f1e9 AMD northbridges: factor out CPU allocation by Kyösti Mälkki · 11 years ago
  8. cd9fc1a AMD northbridges: rewrite CPU allocation by Kyösti Mälkki · 11 years ago
  9. fee73df Auto-declare chip_operations by Kyösti Mälkki · 11 years ago
  10. dbc4739 AMD northbridge: copy TOP_MEM and TOP_MEM2 for distribution by Kyösti Mälkki · 11 years ago
  11. 7bdf85b Move cpus_ready_for_init() to AMD K8 by Kyösti Mälkki · 11 years ago
  12. ffb6bdd AMD f15: Change multiply ONE_MB to bit shifting (Propagation) by zbao · 11 years ago
  13. 15dc3cc AMD f15 nb: Remove the misleading 0x100 from the limitk (Propagation) by zbao · 11 years ago
  14. 49bb26a4 AMD NB: Limit the device field to 5 bits. (Propagation) by zbao · 11 years ago
  15. d462736 Limit the device field to 5 bits. by zbao · 11 years ago
  16. 6b5eb1c AMD and GFXUMA: move setup_uma_memory() to northbridge by Kyösti Mälkki · 11 years ago
  17. 30f0464 AMD Agesa and GFXUMA: drop use of uma_memory_base by Kyösti Mälkki · 11 years ago
  18. f803ac4 AMD K8 and AMDFAM10, GFXUMA: drop use of uma_memory_base by Kyösti Mälkki · 11 years ago
  19. 9fd183e AMD F15tn northbridge: Remove the misleading 0x100 from the limitk. by zbao · 11 years ago
  20. efff733 Refactor driver structs by Patrick Georgi · 11 years ago
  21. 7dc2864 amd/lx: Move configuration from source to Kconfig by Patrick Georgi · 11 years ago
  22. 405cfe2 Change multiply ONE_MB to bit shifting. by zbao · 11 years ago
  23. d59d624 sync the northbridge.c with other family. by zbao · 11 years ago
  24. 6db7f34 Trinity wrapper code improvement. by zbao · 11 years ago
  25. bcdbe90 Drop VGA_BRIDGE_SETUP config option by Patrick Georgi · 11 years ago
  26. 1171986 Drop invalid device ops on Agesa northbridge by Kyösti Mälkki · 11 years ago
  27. de3dde4 AMD: Fix GFXUMA with 4GB or more RAM by Kyösti Mälkki · 11 years ago
  28. ba589e3 Move setup_uma_memory() to K8 northbridge by Kyösti Mälkki · 11 years ago
  29. 231f261 Move setup_uma_memory() to AMDFAM10 northbridge by Kyösti Mälkki · 11 years ago
  30. 55fff930 Move setup_uma_memory() to Agesa Family14 northbridge by Kyösti Mälkki · 11 years ago
  31. d4821fc Move setup_uma_memory() to Agesa Family12 northbridge by Kyösti Mälkki · 11 years ago
  32. 03548aa Move setup_uma_memory() to Agesa Family15 northbridge by Kyösti Mälkki · 11 years ago
  33. cc55b9b Define global uma_memory variables by Kyösti Mälkki · 11 years ago
  34. 63f8c08 Add global uma_resource() by Kyösti Mälkki · 11 years ago
  35. 2c08f6a AGESA F15 wrapper for Trinity by zbao · 11 years ago
  36. 2f00ce3 cbtypes.h: Unify cbtypes.h used in AMD board's code by Vikram Narayanan · 11 years ago
  37. f8f0062 Some more #if cleanup by Patrick Georgi · 11 years ago
  38. e166782 Clean up #ifs by Patrick Georgi · 11 years ago
  39. a403c68 Add default map_oprom_vendev() for AMD Family 14h processors. by Martin Roth · 11 years ago
  40. 26b00e6 Refactor some alignment handling by Patrick Georgi · 11 years ago
  41. f722373 S3 code in coreboot public folder. by zbao · 11 years ago
  42. cab72d9 amdfam10: add phenom II as known cpu by Bernhard Urban · 11 years ago
  43. dd3b227 Fix AMD Fam15 CBMEM allocation by Stefan Reinauer · 11 years ago
  44. 30b46ce Fix AMD Fam12 CBMEM allocation by Stefan Reinauer · 11 years ago
  45. cc6c615 Fix AMD Fam10 CBMEM allocation by Stefan Reinauer · 11 years ago
  46. 3ae1c65 AMD Agesa: delete no-op bootblock files by Kyösti Mälkki · 11 years ago
  47. d11ca1d Rename AMD_AGESA to CPU_AMD_AGESA by Kyösti Mälkki · 11 years ago
  48. f5bb477 Fix AMD Agesa leaking Kconfig by Kyösti Mälkki · 11 years ago
  49. 35e1c86 VIA southbridge K8T890: Apply un-written naming rules by Kyösti Mälkki · 11 years ago
  50. 5750ed2 Fix AMD Fam14 cbmen allocation by Marc Jones · 11 years ago
  51. 8d59569 Clean up whitespace in fam14 northbridge.c by Marc Jones · 11 years ago
  52. c5fc7db Move C labels to start-of-line by Patrick Georgi · 11 years ago
  53. 067d223 Fix ECC disable option for AMD Fam10 DDR2 and DDR3. by Marc Jones · 11 years ago
  54. 472efa6 Remove whitespace. by Patrick Georgi · 11 years ago
  55. 6811f75 AGESA F15: AGESA family15 model 00-0fh northbridge wrapper by Kerry Sheh · 11 years ago
  56. 6b909f2 RD890: AMD RD890/SR56X0 CIMX wrapper by Kerry Sheh · 11 years ago
  57. 976f8cc Make Geode GX2 VGA setup work. by Nils Jacobs · 11 years ago
  58. d0ac789 Update geode GX2 tree to match LX. by Nils Jacobs · 11 years ago
  59. 84e0dfc Clean up AMD Fam14 SSDT by Marc Jones · 11 years ago
  60. a4f06f1 White space and coding style fixes. by Nils Jacobs · 11 years ago
  61. 36b53bf k8: add CONFIG_K8_FORCE_2T_DRAM_TIMING and enable it for asus k8v-x by Florian Zumbiehl · 11 years ago
  62. 2a830d0 Change AMD vendorcode build by Kyösti Mälkki · 11 years ago
  63. fa48b96 k8 raminit: fix bug, improve clock selection, add clock limit for sock754 by Florian Zumbiehl · 11 years ago
  64. 6f7b158 fix DDR_MASK in load-dependent clock limiting for socket 939 in k8 raminit by Florian Zumbiehl · 11 years ago
  65. 7e9de01 Cycle time at CAS Latency (CLX - 2) is at 25 in DDR2 SPD, not at 26 by Florian Zumbiehl · 11 years ago
  66. 5ff7c13 remove trailing whitespace by Stefan Reinauer · 11 years ago
  67. 328a694 AMD CPU and chipset fixes for compilation with gcc 4.6 by Stefan Reinauer · 11 years ago
  68. 86fc984 Fix compilation of AMD GX2 northbridge code with gcc 4.6 by Stefan Reinauer · 11 years ago
  69. 80311ea amdk8: ASL include for K8 temperature sensor support in ACPI by Christoph Grenz · 12 years ago
  70. af90275 TINY_BOOTBLOCK problem-fix on amdk8+amd8111 platforms by enok71 · 11 years ago
  71. 8eb4273 Add AMD Family 10h PH-E0 support by QingPei Wang · 12 years ago
  72. 3f5ebd6 AMD F14 Northbridge updates by efdesign98 · 12 years ago
  73. feed329 AMD F14 southbridge update by Kerry She · 12 years ago
  74. 00c8c4a Update AMD SR5650 and SB700 by efdesign98 · 12 years ago
  75. b58640c Add AMD Family 10 cpu support to northbridge folder by efdesign98 · 12 years ago
  76. 7d6f0bf ASRock E350M1: ACPI-related BSOD fix by Scott Duplichan · 12 years ago
  77. 1fe6c64 Fix memory size reporting on AMD family 14h systems for >= 4GB by Cristian Măgherușan-Stanciu · 12 years ago
  78. 23b2152 Improve VIA K8M890 HT settings. Use recommended settings for ROMSIP and by Rudolf Marek · 12 years ago
  79. 7c0c64e Addition of Family12/SB900 wrapper code by efdesign98 · 12 years ago
  80. 621ca38 Move existing AMD Ffamily14 code to f14 folder by efdesign98 · 12 years ago
  81. 05a89ab Rename {CPU|NB|SB}/amd/*_wrapper folders by efdesign98 · 12 years ago
  82. 471f103 This patch sets max freq defaults for ddr2 and ddr3for fam10. by Marc Jones · 12 years ago
  83. 16c8e37 agesa_wrapper: Avoid repetitive Kconfig depends, trivial by Peter Stuge · 12 years ago
  84. 8c46263 Cosmetic cleanup. by Scott Duplichan · 12 years ago
  85. 5d878ad 1) Remove unused kconfig options. 2) Correct UMA graphics PCI device ID. by Scott Duplichan · 12 years ago
  86. 9ab3c6c Build device paths for AP cores so that coreboot will report them to the OS. by Scott Duplichan · 12 years ago
  87. dc312cc Move mmconf base from e0000000 to f8000000 to avoid conflict with UMA BAR. by Scott Duplichan · 12 years ago
  88. 8d6cf3a Work around unclean CMOS handling for now by Patrick Georgi · 12 years ago
  89. b251753 Change read_option() to a macro that wraps some API uglyness by Patrick Georgi · 12 years ago
  90. d4814bd more ifdef -> if fixes by Stefan Reinauer · 12 years ago
  91. b18f9b0 The "temp" will be used later. So it has to be calculated correctly. by Zheng Bao · 12 years ago
  92. 432461e cleanup wrong use of defined() after exporting all variables in Kconfig by Stefan Reinauer · 12 years ago
  93. 5005bb06 Unify use of post_code by Alexandru Gagniuc · 12 years ago
  94. 2ca2f17 Add AMD C32 support. It is based on other existing Fam10 code. by Zheng Bao · 12 years ago
  95. 314dd0b Enable mahogany_fam10 and Kino family 10h to run the SB HT link at the expected HT3 frequency and width by matching the BUID swap list to the production BIOS. In addition, the BUID swap list has been moved into the project-specific file romstage.c for the other 13 AMD family 10h projects as well. For projects using a desktop AMD family 10h processor, pasting in the mahogany_fam10 swap list will likely allow HT3 operation. This should be confirmed on real hardware before commiting any swap list change. A different swap list will be needed for server projects. For serengeti_cheetah_fam10, a reference BIOS swap list to try is: 0x00, 0x0A, 0x00, 0x06, 0xFF, 0x0A, 0x06, 0xFF. by Scott Duplichan · 12 years ago
  96. 11ac1cf Mark non-returning function as noreturn to help some compiler versions by Patrick Georgi · 12 years ago
  97. 6bdc83b Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 12 years ago
  98. c313210 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 12 years ago
  99. 6276b6f Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 12 years ago
  100. 82b241a Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 12 years ago