Gitiles
Code Review Sign In
review.coreboot.org / coreboot / 6181030ba62e952fbbd4995ecdff4cea33f0df32 / src / soc / intel
  1. 6181030 soc/intel/apollolake: group serial console options into one Kconfig by Aaron Durbin · 8 years ago
  2. 1c3b111 fsp_baytrail: Fix a possible hanging DisplayPort by Werner Zeh · 8 years ago
  3. d3de85c soc/intel/quark: Add the initial pieces required for ACPI tables by Lee Leahy · 8 years ago
  4. 9d02153 fsp_baytrail: Add full support for iosf access in reg_script by Werner Zeh · 8 years ago
  5. f55f3e6 soc/intel/quark: Use single ID value for HSUART1 by Lee Leahy · 8 years ago
  6. 654fd07 soc/intel/quark: Enable HSUART1 by Lee Leahy · 8 years ago
  7. 535333d soc/intel/quark: Establish the Memory Map by Lee Leahy · 8 years ago
  8. b457649 soc/intel/quark: Enumerate the PCI devices by Lee Leahy · 8 years ago
  9. 32d3995 soc/intel/apollolake: bootblock: implement platform_prog_run() by Andrey Petrov · 8 years ago
  10. 6f0e6fa skylake: Finalize SMM in coreboot by Duncan Laurie · 8 years ago
  11. 5f0cd58 skylake: Check for power failure when WAK_STS is not set by Duncan Laurie · 8 years ago
  12. 3054c8b skylake: Enable DDI-A 4-lane support if GOP does not execute by Duncan Laurie · 8 years ago
  13. 73b753a skylake: acpi: Make GRXS method serialized by Duncan Laurie · 8 years ago
  14. c370fe3 soc/intel/apollolake: add assert for pad constraints by Aaron Durbin · 8 years ago
  15. c65b8f1 soc/intel/apollolake: pre-evaluate gpio number values by Aaron Durbin · 8 years ago
  16. ada13ed soc/intel/apollolake: limit bootblock size to 32KiB by Aaron Durbin · 8 years ago
  17. 8c09377 timestamp: Remove HAS_PRECBMEM_TIMESTAMP_REGION Kconfig by Julius Werner · 8 years ago
  18. 622eea7 arches: lib: add main_decl.h for main() declaration by Aaron Durbin · 8 years ago
  19. 87fb1a6 soc/apollolake: Add early serial driver for BOOTBLOCK_CONSOLE by Andrey Petrov · 8 years ago
  20. 57799dc soc/apollolake: Add minimal GPIO driver by Andrey Petrov · 8 years ago
  21. dfc2b31 soc/apollolake: Add initial cache-as-ram setup for bootblock by Alexandru Gagniuc · 9 years ago
  22. 59ff340 Kconfig: Move defaults for CBFS_SIZE by Martin Roth · 8 years ago
  23. 89c61b5 soc/intel/quark: Report CPU info by Lee Leahy · 8 years ago
  24. d4edacb soc/intel/quark: Call FSP SiliconInit by Lee Leahy · 8 years ago
  25. 43cdff6 soc/intel/quark: MTRR support by Lee Leahy · 8 years ago
  26. 3968653 soc/fsp_baytrail: Add support for FSP MR 005 by Ben Gardner · 9 years ago
  27. 318ef96 soc/intel/quark: FSP MemoryInit Support by Lee Leahy · 8 years ago
  28. 4852dec intel/skylake: Add gpio macro for unused GPIO pins by david · 9 years ago
  29. 87df8d0 soc/intel/quark: Enable Serial Port by Lee Leahy · 8 years ago
  30. 16ff859 nhlt: add api to override oem_id and oem_table_id of acpi_header_t by Fang, Yang A · 9 years ago
  31. 3cbf8d9 chromeos: Remove CONFIG_VBNV_SIZE variable by Duncan Laurie · 9 years ago
  32. a7ba56e soc/intel/quark: Add TempRamInit support by Lee Leahy · 8 years ago
  33. 9fd0895 soc/intel/quark: Enable ESRAM by Lee Leahy · 9 years ago
  34. 6c1bf27 intel/skylake: disable ACPI PM Timer to enable XTAL OSC shutdown by Archana Patni · 9 years ago
  35. 50c3ba2 intel/skylake: unconditionally set SPI controller BAR by Aaron Durbin · 9 years ago
  36. cbc3c37 intel/skylake: implement vboot_platform_prepare_reboot() by Aaron Durbin · 9 years ago
  37. a1faa4c intel/skylake: implement vboot_platform_is_resuming() by Aaron Durbin · 9 years ago
  38. 9dca83c intel/skylake: Display ME firmware status before os boot by Dhaval Sharma · 9 years ago
  39. 2ed7eb7 soc/intel/quark: Add minimal Quark SoC X1000 files by Lee Leahy · 9 years ago
  40. 9590992 soc/intel/common: Use SoC specific routine to read/write MTRRs by Lee Leahy · 9 years ago
  41. b00ddec Kconfig: indent with tabs, not spaces. by Martin Roth · 9 years ago
  42. e0918bb drivers/intel/fsp1_1: Fix spelling error in API and copyright by Lee Leahy · 9 years ago
  43. 7e86cd4 soc/intel: Add skeleton infrastructure for Apollolake SOC by Alexandru Gagniuc · 9 years ago
  44. 5166827 soc/braswell: Fix Global NVS base address by Hannah Williams · 9 years ago
  45. 3e3d969 src/: Chmod 644 all .c, .h, .asl, .inc, .cb, .hex, & Kconfig files by Martin Roth · 9 years ago
  46. fbdc719 intel/skylake: Implement native Cache-as-RAM (CAR) by Subrata Banik · 9 years ago
  47. cc728f0 soc/braswell: Add interface to program USB2_COMPBG register by shkim · 9 years ago
  48. 01be52e soc/braswell/acpi/DPTF: Write TCHG state on AC connect. by Jenny TC · 9 years ago
  49. ba6dfe4 soc/braswell/acpi: Fix CID1 offset in comment by Hannah Williams · 9 years ago
  50. d077b58 soc/braswell: Fix issues found during static code analysis by Ravi Sarawadi · 9 years ago
  51. b1e4bd0 Braswell: Separate L1 Sub State init procedure for boards. by Kenji Chen · 9 years ago
  52. c4153c1 Strago: Enable CA Mirror by Shobhit Srivastava · 9 years ago
  53. 89a6685 soc/braswell: Disable SD card detect simulation in FSP by Divya Sasidharan · 9 years ago
  54. b0eb594 soc/braswell: Set max frequency to be turbo frequency by Hannah Williams · 9 years ago
  55. aff502e soc/braswell: Fix DSP clock by fdurairx · 9 years ago
  56. b092c9e drivers/intel/fsp1_1: Remove extra include references by Lee Leahy · 9 years ago
  57. 97f09c3 soc/braswell: Fix leakage on V1P8S rail by Shobhit Srivastava · 9 years ago
  58. fc5489f soc/braswell: Add macro NATIVE_INT_PU20K by Hannah Williams · 9 years ago
  59. ed7275f Braswell: Implement Gpio library functions to read RAMID by Subrata Banik · 9 years ago
  60. 15184e0 soc/braswell: Add method for Wifi regulatory domain by Felix Durairaj · 9 years ago
  61. a69d2f4 intel/skylake: Fix klockwork violation by Naresh G Solanki · 9 years ago
  62. f9495ea intel/skylake: Thermal Design Power PL1 and PL2 Config Changes by pchandri · 9 years ago
  63. 6720394 intel/skylake: remove third paragraph of license header by Martin Roth · 9 years ago
  64. 576b7c7 broadwell: gpio.asl: Make GWAK method serialized by Duncan Laurie · 9 years ago
  65. 54093e4 Braswell: add code to support customization of I2C data hold time by Kane Chen · 9 years ago
  66. a1b3547 intel/skylake: Fix issues found by klockwork by Naresh G Solanki · 9 years ago
  67. f1eac38 intel/skylake: Adding provision to set voltages to the I2C ports by Naresh G Solanki · 9 years ago
  68. 5535cea intel/skylake: Disable SaGv in recovery mode by haridhar · 9 years ago
  69. d5fd2dd soc/braswell: Remove the unneccessary functions from pcie.c by Shaunak Saha · 9 years ago
  70. 1ed1659 intel/skylake: Add support for IV feedback loop capture blob by Sathya Prakash M R · 9 years ago
  71. c019cec intel/skylake: Change in UPD name from SkipMpInit to FspSkipMpInit by Barnali Sarkar · 9 years ago
  72. a7feb9f intel/skylake: Remove unused devicetree configuration variables by Duncan Laurie · 9 years ago
  73. df21440 intel/skylake: provide default VR configuration by Aaron Durbin · 9 years ago
  74. ddd9f1a intel/skylake: Add devicetree setting for DDR frequency limit UPD by Duncan Laurie · 9 years ago
  75. 63f8c0a intel/skylake: Add elog event for THERMTRIP by Duncan Laurie · 9 years ago
  76. 7846e34 intel/skylake: disable heci1 if psf is unlocked by Archana Patni · 9 years ago
  77. df13c31 intel/skylake: During RO mode after FSP reset CB lose original state by Subrata Banik · 9 years ago
  78. 5d6929b intel/skylake: Fix uninitialized variable warning by Martin Roth · 9 years ago
  79. 086730b intel/skylake: Add kconfig option to skip Native SD Controller by Subrata Banik · 9 years ago
  80. 2b1e8b3 intel/skylake: Add VrConfig UPD parameters from coreboot by Rizwan Qureshi · 9 years ago
  81. b6319c1 intel/skylake: Enable SkipMpInit token by Rizwan Qureshi · 9 years ago
  82. 19d9fe9 intel/skylake: Init variable so GCC knows it's set by Martin Roth · 9 years ago
  83. e64f794 intel/skylake: More UPD params are added for PCH policy in FSP by Rizwan Qureshi · 9 years ago
  84. b57772d intel/skylake: Update UPD parameters as per FSP 1.8.0 by Barnali Sarkar · 9 years ago
  85. fbc4609 intel/skylake: Add GPIO ACPI Apis. by Subrata Banik · 9 years ago
  86. ed8a723 intel/skylake: add nhlt support by Aaron Durbin · 9 years ago
  87. 1ff0f54 soc/braswell: Add CPUID for D0 stepping by Divya Sasidharan · 9 years ago
  88. 45a221d soc/braswell: Fix P-state table by Subrata Banik · 9 years ago
  89. baf00e6 intel/skylake/pcr.c: error out on invalid size in pcr read/write by Martin Roth · 9 years ago
  90. a20ac2f tree: drop last paragraph of GPL copyright header from new files by Martin Roth · 9 years ago
  91. 5559e89 intel/skylake: Remove check for Microcode loaded by ME by Martin Roth · 9 years ago
  92. b95a074 fsp_baytrail: Add additional PCI space above 4GB by Martin Roth · 9 years ago
  93. 481a19c intel/braswell: Disable IFD & ME by default so abuild can build by Martin Roth · 9 years ago
  94. 2ed0aa2 Correct some common spelling mistakes by Martin Roth · 9 years ago
  95. f812c44 intel/braswell: Build in both C0 and 'other' vbios by Martin Roth · 9 years ago
  96. 8d2b49f soc/intel/broadwell: Add back support for EHCI debug setup by Duncan Laurie · 9 years ago
  97. 791d058 broadwell: Fix SATA Gen3 DTLE configuration registers by Duncan Laurie · 9 years ago
  98. 9d08c4a broadwell: Fix CONFIG_SPI_CONSOLE usage by Duncan Laurie · 9 years ago
  99. d890b45 ACPI: Add hack to avoid IASL warning when reading back registers by Martin Roth · 9 years ago
  100. c890996 soc/intel/fsp_baytrail: Make sure i2c bus is < 7 by Martin Roth · 9 years ago