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review.coreboot.org / coreboot / 5f6cf6105c701f017c1a194710b05bba2756d003 / src / vendorcode / amd / opensil / genoa_poc / ramstage.c
  1. 5f6cf61 vendorcode/amd/genoa: Parse APOB for DRAM layout by Arthur Heymans · 1 year, 1 month ago
  2. 62389ab vendorcode/amd/opensil: Add SATA configuration by Arthur Heymans · 1 year, 1 month ago
  3. f643a4d vendorcode/amd/opensil: Add USB configuration by Martin Roth · 11 months ago
  4. 81ceea1 vendorcode/amd/opensil: Set up resource manager input block by Arthur Heymans · 1 year, 1 month ago
  5. adee6a6 vendorcode/amd/opensil: Add initial setup and API calls by Arthur Heymans · 1 year, 1 month ago