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review.coreboot.org / coreboot / 5aaeb27de97e2badba469229df9b2af9e33619e4 / src / northbridge / intel / gm45 / gm45.h
  1. 5aaeb27 nb/intel/gm45: Export low-power and (SFF) options by Nico Huber · 9 years ago
  2. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  3. 83fc32f device_ops: add device_t argument to write_acpi_tables by Alexander Couzens · 9 years ago
  4. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  5. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  6. 089a510 northbridge/intel: Do not define include guard as 1 by Edward O'Callaghan · 10 years ago
  7. 33769a5 gm45: Convert to per-device ACPI by Vladimir Serbinenko · 10 years ago
  8. 56ae8a0 gm45: Decrease MTRR usage by Vladimir Serbinenko · 10 years ago
  9. 020dc0e gm45: Allow skiping voltage config. by Vladimir Serbinenko · 10 years ago
  10. c4d8948 gm45: Move spd address map to board-specific config. by Vladimir Serbinenko · 10 years ago
  11. dcb688e CBMEM: Unify get_top_of_ram() by Kyösti Mälkki · 11 years ago
  12. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  13. 2efc880 intel/gm45: new northbridge by Patrick Georgi · 12 years ago